摘要:
An adaptive semiconductor memory device is used for being inserted into a host for storage. The semiconductor memory device comprises a non-volatile memory and a switch. The switch can be a logical switch or a physical switch that controls the semiconductor memory device to be in compliance with either a first specification version or a second specification version of the semiconductor memory device. The second specification version in comparison with the first specification version is used for higher capacity applications.
摘要:
A method of wear leveling for a non-volatile memory is disclosed. A non-volatile memory is divided into windows and gaps, with each gap between two adjacent windows. The windows comprise physical blocks mapped to logical addresses, and the gaps comprise physical blocks not mapped to logical addresses. The windows are shifted through the non-volatile memory in which the mapping to the physical blocks in the window to be shifted is changed to the physical blocks in the gap.
摘要:
An operation method of a memory includes the steps of calculating an offset of sequential write commands and the beginning of pages of a block of a non-volatile memory; shifting the block by the offset; and directly writing data from a host to the pages except the first and last pages of the block by the sequential write commands. In an embodiment, the pages are logical pages providing optimal writing efficiency and are determined before calculating the offset. The step of shifting the block by the offset is to increase corresponding logical block addresses (LBA) in the pages by the offset.
摘要:
A method of wear leveling for a non-volatile memory is performed as follows. First, the non-volatile memory is divided into a plurality of zones including at least a first zone and a second zone. The first zone is written and/or erased in which one or more logical blocks have higher writing hit rate, and therefore the corresponding physical blocks in the first zone will be written more often. The next step is to find one or more free physical blocks in second zone. The physical blocks of the first zone are replaced by the physical blocks of the second zone if the number of write and/or erase to the first zone exceeds a threshold number. The replacement of physical blocks in the first zone by the physical blocks in the second zone may include the steps of copying data from the physical blocks in the first zone to the physical block in the second zone, and changing the pointer of logical blocks to point to the physical blocks in the second zone.
摘要:
A method of memory management for an apparatus having a non-volatile memory and a volatile memory includes the steps of forming a tree structure of entries in the volatile memory, in which the tree structure has a left branch and a right branch, and a difference of heights of the left branch and the right branch is equal to or less than one; and accessing an entry in the volatile memory through the tree structure.
摘要:
A method is employed to manage a memory, e.g., a flash memory, including a plurality of paired pages. Each paired page includes a page and a respective risk zone. For each write command, at least one unwritten page is selected for writing new data. For each unwritten page whose risk zone includes at least one written page, each written page is copied or backed up, and the new data is written to the unwritten page. For each unwritten page whose risk zone lacks a written page, the new data is written to the unwritten page. In an embodiment, the written page is copied only if the unwritten page and the written page are operated by different write commands.
摘要:
According to the method of wear leveling for a non-volatile memory of the present invention, the non-volatile memory is divided into a plurality of windows, and a mapping table is built in which the logical block addresses having frequently accessed data are allocated equally to the plurality of windows. The logical block addresses may store a File Allocation Table (FAT) or a directory table; therefore the windows they locate will be written or erased more frequently. In an embodiment, the logical block addresses having frequently accessed data are allocated on a one-to-one basis to the plurality of windows. For example, the plurality of windows may comprise Windows 0, 1, 2 and 3, the logical block addresses comprise logical block addresses 0, 1, 2 and 3, and logical block addresses 0, 1, 2 and 3 point to Windows 0, 1, 2 and 3, respectively.