摘要:
A semiconductor integrated circuit is disclosed that operates in synch with a clock signal supplied from an external source, and by a voltage supplied by a power supply. The circuit includes a detection means for detecting that at least one of a frequency of the clock signal and the supply voltage is reduced, and an internal voltage reduction means for lowering an internal voltage of the semiconductor integrated circuit when the detection means detects that at least one of the frequency and the supply voltage is lowered.