公开(公告)号：US11831287B2

公开(公告)日：2023-11-28

申请号：US17531811

申请日：2021-11-22

Applicant: Faraday Technology Corp.

Inventor： Prateek Kumar Goyal ,  Raghu Nandan Chepuri ,  Vinod Kumar Jain

IPC: H04B10/00 ,  H03G3/30 ,  H04B10/69 ,  H03M1/12 ,  H03F3/45

CPC classification number: H03G3/3084 ,  H03F3/45 ,  H03M1/12 ,  H04B10/6933 ,  H03F2200/375 ,  H03F2203/45212

Abstract: A method for removing offset in a receiver of an integrated circuit (IC) includes: determining digital codes of differential input voltages of an amplifier in a first receiving lane of the receiver; comparing the digital codes to a digital code corresponding to an optimum common mode voltage (VCM) of the receiver; according to the comparison, determining a bias code for adjusting both the differential input voltages to match the optimum VCM; and inputting the bias code to a bias circuit of the receiver. The first receiving lane of the receiver includes a plurality of amplifiers. The method steps are repeated for each amplifier of the plurality of amplifiers, and then repeated for all receiving lanes of the IC.

公开(公告)号：US11070351B1

公开(公告)日：2021-07-20

申请号：US17138910

申请日：2020-12-31

Applicant: Faraday Technology Corp.

Inventor： Raghu Nandan Chepuri

IPC: H04L7/00 ,  H04L25/03 ,  H04L25/49

Abstract: The controller includes a first equalizer, a first detector, a second detector, a multiplexer, a data clock generator, and a second equalizer. The first equalizer is configured to receive and equalize the input data. The first detector is configured to detect optimum phase of the input data. The optimum phase of the input data represents the input data peak. The second detector is configured to generate an envelope data according to the input data and detect peak of envelop with respect to sampling phase. The data clock generator is configured to generate the recovered data clock. The second equalizer is configured to generate the recovered data. The multiplexer is configured to generate an offset value according to the input data peak and the envelope data peak. The offset value represents the recovered data clock having an optimum sampling frequency and an optimum sampling phase.