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公开(公告)号:US20190207573A1
公开(公告)日:2019-07-04
申请号:US16042006
申请日:2018-07-23
发明人: Cornel D. STANESCU , Razvan PUSCASU
IPC分类号: H03F3/45 , H03K19/0175
CPC分类号: H03F3/45475 , H03F2200/171 , H03F2200/271 , H03F2200/372 , H03F2200/375 , H03K19/017509
摘要: A chopper-stabilized amplifier that includes an analog driven level shifter is disclosed. The analog driven level shifter changes the levels of a pair of complementary clock signals according to a level associated with an input signal to the chopper-stabilized amplifier. The level shifted complementary clock signals are used to control switching devices used for chopping input signals of various voltages. The chopper-stabilized amplifier also includes symmetrical passive RC notch filters having two cut-off frequencies to reduce ripple noise from the chopping.
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公开(公告)号:US20190089365A1
公开(公告)日:2019-03-21
申请号:US15919912
申请日:2018-03-13
发明人: Kentaro YOSHIOKA , Tetsuro ITAKURA
CPC分类号: H03M1/002 , H03F1/0205 , H03F1/0277 , H03F3/005 , H03F3/19 , H03F3/195 , H03F3/21 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F3/45982 , H03F2200/375 , H03F2200/451 , H03F2203/45022 , H03F2203/45026 , H03F2203/45512 , H03F2203/45702 , H03M1/164 , H03M1/804 , H04W52/0209
摘要: Amplifier circuitry has sampling circuitry which samples an input voltage, a quantizer which quantizes an output voltage of the sampling circuitry and outputs an output code, a differential amplifier which amplifies a differential voltage between the output voltage of the sampling circuitry and a reference voltage and performs offset adjustment according to the output code of the quantizer, and a first capacitor which is connected between an output node of the differential amplifier and an output node of the sampling circuitry.
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公开(公告)号:US20180323759A1
公开(公告)日:2018-11-08
申请号:US15811771
申请日:2017-11-14
发明人: Christian COJOCARU , Igor MILETIC , Tudor LIPAN , Michael SAWIRES
CPC分类号: H03F3/45071 , H03F3/19 , H03F3/195 , H03F3/45475 , H03F3/45982 , H03F2200/271 , H03F2200/273 , H03F2200/336 , H03F2200/375 , H03F2200/426 , H03F2200/451 , H03F2200/462 , H03F2203/45212
摘要: A Galvanically Isolated Amplifier (GIA) includes an isolation barrier to galvanically isolate high voltage circuitry from low voltage circuitry. The high voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to ground potential at a first potential relative to the ground potential. The low voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to the ground potential at a second potential, the second potential being smaller than the first potential. A Radio Frequency (RF) carrier is digitally Phase Shift Keying (PSK) modulated for transmission across the isolation barrier. The unmodulated RF carrier could also be transmitted across the isolation barrier. PSK modulation could be applied to the RF carrier based on a test waveform to generate a PSK-modulated test signal for transmission while a voltage transient is applied between the high voltage circuitry and the low voltage circuitry.
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公开(公告)号:US20180254746A1
公开(公告)日:2018-09-06
申请号:US15882933
申请日:2018-01-29
申请人: pSemi Corporation
发明人: David Kovac
CPC分类号: H03F1/0222 , G05F1/56 , H03F1/0266 , H03F1/223 , H03F3/193 , H03F3/195 , H03F3/21 , H03F3/245 , H03F2200/18 , H03F2200/375 , H03F2200/451 , H03F2200/555 , H03F2200/61 , H03G1/0023 , H03G1/0029 , H03G1/007
摘要: Systems, methods and apparatus for efficient power control of an RF amplifier for amplification of a constant envelope RF signal are described. A reduction in a size of a pass device of an LDO regulator is obtained by removing the pass device of the LDO regulator from a main current conduction path of the RF amplifier. Power control is provided by varying one or more gate voltages to cascoded transistors of a transistor stack of the RF amplifier according to a power control voltage. Various configurations for controlling the gate voltages are presented by way of a smaller size LDO regulator or by completely removing the LDO regulator. In a case where a supply voltage to the transistor stack varies, such as in a case of a battery, a compensation circuit is used to adjust the power control voltage in view of a variation of the supply voltage, and therefore null a corresponding drift in output power of the RF amplifier.
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公开(公告)号:US10038404B1
公开(公告)日:2018-07-31
申请号:US15630242
申请日:2017-06-22
发明人: Pantelis Sarais , David Seebacher , Peter Singerl , Herwig Wappis
CPC分类号: H03F1/0205 , H03F1/0266 , H03F1/0272 , H03F1/301 , H03F1/304 , H03F3/193 , H03F3/21 , H03F2200/375 , H03F2200/447 , H03F2200/451 , H03F2200/462 , H03F2200/468
摘要: Techniques are provided for adapting a bias provided to a radio frequency (RF) power amplifier (PA), so as to achieve linear operation over a wide range of conditions. The techniques use open-loop temperature compensation based upon a sensed current during periods when the RF PA is active and inactive. A closed-loop control technique is enabled when the RF PA is inactive. The combined control techniques compensate for temperature variation as well as long-term drift of the semiconductor properties of the devices within the RF PA.
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公开(公告)号:US10002570B2
公开(公告)日:2018-06-19
申请号:US14975389
申请日:2015-12-18
申请人: Apple Inc.
发明人: Chin-Wei Lin , Vasudha Gupta , Yafei Bi
IPC分类号: G09G3/3283 , G09G3/3258 , G09G3/3266 , G09G3/36 , G09G3/3225 , G09G3/3275 , G09G3/20
CPC分类号: G09G3/3283 , G09G3/2048 , G09G3/3225 , G09G3/3233 , G09G3/3258 , G09G3/3266 , G09G3/3275 , G09G3/3291 , G09G3/3614 , G09G3/3688 , G09G2300/0819 , G09G2300/0876 , G09G2310/0254 , G09G2310/0291 , G09G2320/0204 , G09G2320/0233 , G09G2320/0247 , H03F2200/375
摘要: Systems and method for improving display quality of an electronic display. In one embodiment the electronic display includes a first display pixel that facilitates displaying a first image frame using first amplified image data and facilitates displaying a second image frame using second amplified image data; a second display pixel that facilitates displaying the first image frame using third amplified image data; a first amplifier that operates in a first operational mode to generate the first amplified image data based on image data corresponding with the first image frame and operates in a second operational mode to generate the second amplified image data based on image data corresponding with the second image frame; and a second amplifier that operates in the second operational mode to generate the third amplified image data based on the image data corresponding with the first image frame.
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公开(公告)号:US20170310289A1
公开(公告)日:2017-10-26
申请号:US15492947
申请日:2017-04-20
发明人: Yoichi SHIMENO
IPC分类号: H03F3/387
CPC分类号: H03F3/387 , H03F3/45475 , H03F3/45968 , H03F2200/261 , H03F2200/375
摘要: One embodiment provides an analog front-end circuit. When a chopping signal has a first logical value, a non-inverting instrumentation preamplifier subtracts a second input voltage from a first input voltage and generates a first output voltage by amplifying a subtraction voltage while outputting the second input voltage as a second output voltage. When the chopping signal has a second logical value, the non-inverting instrumentation preamplifier subtracts the first input voltage from the second input voltage and generates the first output voltage by amplifying and then inverting the polarity of a subtraction voltage while outputting the second input voltage as the second output voltage.
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公开(公告)号:US09667209B2
公开(公告)日:2017-05-30
申请号:US14884209
申请日:2015-10-15
发明人: Motomitsu Iwamoto
CPC分类号: H03F3/2173 , H03F3/45183 , H03F3/45771 , H03F2200/375 , H03F2203/45044 , H03F2203/45674
摘要: An output voltage delay time caused by the relationship between offset voltage and input voltage is shortened. A single power supply amplifying device includes first and second amplifying units, a state detecting unit, and an offset voltage correcting unit. The first amplifying unit has differential pair transistors and amplifies the difference between input voltages. The second amplifying unit amplifies a first output voltage of the first amplifying unit. The state detecting unit detects a state where a negative offset voltage that causes a second output voltage of the second amplifying unit to be lower than the input voltage occurs, and a potential of the input voltage is lower than the absolute value of the negative offset voltage. The offset voltage correcting unit then corrects the negative offset voltage to a positive offset voltage that causes the second output voltage to be higher than the input voltage.
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公开(公告)号:US09628024B2
公开(公告)日:2017-04-18
申请号:US14765240
申请日:2014-01-31
申请人: SNAPTRACK, INC.
发明人: Gerard Wimpenny
CPC分类号: H03F1/0211 , H02M1/00 , H02M3/158 , H02M2001/0045 , H03F1/0227 , H03F1/0238 , H03F3/189 , H03F3/19 , H03F3/20 , H03F3/211 , H03F3/245 , H03F2200/102 , H03F2200/135 , H03F2200/351 , H03F2200/375 , H03F2200/391 , H03F2200/432 , H03F2200/451 , H03F2203/21106 , H03F2203/21142
摘要: There is disclosed an envelope tracking modulated supply arranged to generate a modulated supply voltage in dependence on a reference signal, comprising a low frequency path for tracking low frequency variations in the reference signal and including a switched mode power supply, a correction path for tracking high frequency variations in the reference signal and including a linear amplifier, a feedback path from the output of the linear amplifier to the input of the linear amplifier, and a combiner for combining the output of the switched mode power supply and the output of the linear amplifier to generate a modulated supply voltage.
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公开(公告)号:US09614502B2
公开(公告)日:2017-04-04
申请号:US14818091
申请日:2015-08-04
发明人: Minhan Chen , Kenneth Luis Arcudia
IPC分类号: H03K3/356
CPC分类号: H03K3/356104 , H03F3/45183 , H03F3/45475 , H03F3/72 , H03F2200/234 , H03F2200/27 , H03F2200/297 , H03F2200/366 , H03F2200/375 , H03F2200/45 , H03F2200/525 , H03F2200/75 , H03F2200/78 , H03F2200/84 , H03F2203/7203
摘要: A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors.
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