公开(公告)号：US10268226B1

公开(公告)日：2019-04-23

申请号：US15925781

申请日：2018-03-20

Applicant: Faraday Technology Corp.

Inventor： Wei Wang ,  Xiao-Dong Fei

IPC: G05F3/22 ,  G05F3/30

Abstract: The disclosure provides a voltage generating device and a calibrating method thereof. The voltage generating device includes a bandgap circuit, a regulator circuit and a calibrating circuit. The bandgap circuit provides a bandgap voltage. The regulator circuit generates an output voltage correspondingly according to the bandgap voltage. In a first stage of a calibration period, the calibrating circuit detects the bandgap voltage, and correspondingly sets a resistance of at least one resistor of the bandgap circuit according to the bandgap voltage. In a second stage of the calibration period, the calibrating circuit detects the output voltage, and correspondingly sets a resistance of at least one resistor of the regulator circuit according to the output voltage.

公开(公告)号：US20230244190A1

公开(公告)日：2023-08-03

申请号：US17732432

申请日：2022-04-28

Applicant: Faraday Technology Corporation ,  Faraday Technology Corp.

Inventor： Ling Chen ,  Prateek Kumar GOYAL ,  Xiao-Dong Fei

IPC: G05B13/02

CPC classification number: G05B13/025 ,  G05B13/026

Abstract: A receiver device and an eye pattern-based control parameter adjustment method are provided. The receiver device includes a receiving circuit and a control circuit. The control circuit performs an iterative operation to determine an optimized control parameter, and updates current control parameters of the receiving circuit to the optimized control parameter after completing the iterative operation. The receiving circuit processes an input signal according to the current control parameters to generate recovered data. The iterative operation includes: updating the current control parameters of the receiving circuit to candidate control parameters; checking a size relationship between an optimized eye mask and a current eye pattern; and increasing the optimized eye mask according to the current eye pattern when the optimized eye mask does not conflict with the current eye pattern, and updating the optimized control parameters to the candidate control parameters corresponding to the new eye mask.

公开(公告)号：US20240178753A1

公开(公告)日：2024-05-30

申请号：US18135182

申请日：2023-04-16

Applicant: Faraday Technology Corp.

Inventor： Chen-Hui Xu ,  Xiao-Dong Fei ,  Wen-Chi Huang ,  Hui-Wen Hu

IPC: H02M3/155

CPC classification number: H02M3/155

Abstract: The present invention discloses a regulator. The regulator includes a bias voltage generating circuit and a flipped voltage follower (FVF), wherein the bias voltage generating circuit is configured to generate a bias voltage, and the FVF is configured to generate an output voltage according to the bias voltage and a supply voltage. The FVF includes a first P-type transistor and a first N-type transistor. The P-type transistor is configured to receive the bias voltage via a gate electrode of the P-type transistor, to generate the output voltage on a source electrode of the P-type transistor. A drain electrode of the first N-type transistor is connected to the supply voltage, a source electrode of the first N-type transistor is connected to the source electrode of the first P-type transistor, and a gate electrode of the first N-type transistor receives a driving signal for compensating the output voltage.

公开(公告)号：US11381222B2

公开(公告)日：2022-07-05

申请号：US17178194

申请日：2021-02-17

Applicant: FARADAY TECHNOLOGY CORPORATION ,  Faraday Technology Corp.

Inventor： Ling Chen ,  Andrew Chao ,  Xiao-Dong Fei

IPC: H03K3/012 ,  H03K5/01 ,  H03K5/1252 ,  H03K5/00 ,  H04B1/16 ,  H03K3/037 ,  H03K19/20

Abstract: An apparatus for performing baseline wander correction (BLWC) with the aid of differential wander current sensing includes filters and a correction circuit. The filters are positioned in a front-end circuit of a receiver and coupled to a set of input terminals of the receiver, and filter a set of input signals on the set of input terminals to generate a set of differential signals on a set of secondary terminals, for further usage by the receiver. The correction circuit is positioned in the frontend circuit and electrically connected to the set of input terminals and the set of secondary terminals, and performs BLWC on the set of differential signals according to the set of input signals. In the correction circuit, amplifiers and resistors form a differential wander current sensor to sense differential wander current, and a set of current mirrors generate corresponding baseline wander compensation current to perform BLWC.

公开(公告)号：US10855437B1

公开(公告)日：2020-12-01

申请号：US16583234

申请日：2019-09-25

Applicant: Faraday Technology Corporation ,  Faraday Technology Corp.

Inventor： Ling Chen ,  Andrew Chao ,  Xiao-Dong Fei ,  Wei Liu

IPC: H04L7/033 ,  H03L7/08

Abstract: The present invention provides a clock data recovery apparatus and an operation method thereof. The clock data recovery apparatus includes an equalizer, a phase detector, a charge pump, and an oscillation circuit. The equalizer is configured to equalize raw data to generate equalized data. The phase detector is coupled to the equalizer to receive the equalized data. The phase detector is configured to generate a detection result according to the equalized data. The phase detector performs pattern-filtering on the equalized data to filter out at least one pattern. The charge pump is coupled to the phase detector to receive the detection result. The charge pump is configured to generate a control signal according to the detection result. The oscillation circuit is coupled to the charge pump to receive the control signal. The oscillation circuit is configured to generate a clock signal according to the control signal.