Abstract:
An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame. Alternate areas between the surface discharge electrodes are assigned as blind lines and a discharge light emission in the blind lines is blocked or incident light to the blind lines from the outside is absorbed. Address electrodes are provided for each monochromatic pixel column and selectively connected with the pads above them, performing simultaneous selection of lines.
Abstract:
A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.