Abstract:
A voltage-variable semiconductive capacitor is described wherein a smooth alteration in output capacitance is produced by incrementally extending a PN junction along the surface of a semiconductive body with an inversion layer formed below a control electrode insulator characterized by a decreased capacitance with increased span of the insulator from the expanding edge of the PN junction. In a first embodiment of the invention, the decreased capacitance is achieved by increasing the thickness of the control electrode insulator at a linear slope between 0.25 and 3.0 percent while in a second embodiment, the thickness of the control electrode insulator is increased in uniform steps of approximately 200-500 A, to produce a digitalized change in output capacitance. A capacitor structure also is described wherein isolated regions of a first type conductivity within a semiconductive body of second type conductivity are sequentially interconnected utilizing commonly energized control electrodes having a gradually reduced capacitance relative to the underlying semiconductive body with increased departure of each electrode from the edge of the initially extended region.
Abstract:
A storage target for a read, write and erase memory is disclosed utilizing a semiconductor memory storage element. The storage of information relies on charge storage to create or pinch off a conductive channel between an internal conductive electrode and isolated diode junctions. An electron beam, irradiating each storage area, is used for reading, writing and erasing.
Abstract:
A PN junction region formed in a portion of a semiconductor wafer extends beneath the edge of a conductor overlaid on an insulating layer atop the wafer, in absence of voltage above a threshold amplitude across the conductor and wafer. As this voltage is increased to exceed the threshold amplitude, majority carriers are repelled from the wafer surface beneath the conductor and sufficient minority carriers are accumulated near the surface to invert the surface. This extends the PN junction beneath the entire conductor, with an attendant increase in junction capacitance.