公开(公告)号：US20180250762A1

公开(公告)日：2018-09-06

申请号：US15450726

申请日：2017-03-06

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Cui YAN ,  Srikanth Chandrudu KOTTILINGAM ,  Brian Lee TOLLISON ,  Cem Murat EMINOGLU

IPC: B23K1/20 ,  B24C1/00 ,  B08B3/02 ,  B08B7/00

CPC classification number: B23K1/206 ,  B08B3/02 ,  B08B3/024 ,  B08B7/0042 ,  B08B7/0071 ,  B23K2101/001 ,  B23K2103/05 ,  B23K2103/08 ,  B23K2201/001 ,  B23K2203/05 ,  B23K2203/08 ,  B24C1/00 ,  F01D5/005

Abstract: A process for treating a component comprising the steps of capturing a digital image of a gap in a portion of a component. The gap is characterized as having gap walls, a length and at any point along its length as having the features of an inner width between the gap walls, an outer width between the gap walls, and a depth. One or more of such features is measured at one or more points along all or a portion of the length of the gap. The measurements are used to determine a water jet cleaning path, a cleaning edge relative to a gap wall and path angle. A water jet is passed along all or a portion of the selected path to remove debris and/or a portion of a gap wall. The treated gap is then processed further to join the gap edges using a suitable sealing method.