公开(公告)号：US20240321703A1

公开(公告)日：2024-09-26

申请号：US18678251

申请日：2024-05-30

Applicant: Georgia Tech Research Corporation

Inventor： Novuo Ogura ,  Siddharth Ravichandran ,  Venkatesh V. Sundaram ,  Rao R. Tummala

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49822 ,  H01L21/4803 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49827 ,  H01L23/562

Abstract: Semiconductor packages and, more particularly, chip-embedded semiconductor packages. The packages include core panels with apertures extending through the core panel. Semiconductor chips are embedded within chip apertures. A molding compound can be positioned along one side of the core panel. The semiconductor chips can be embedded within the molding compound. The semiconductor chips also can be adhered to the molding compound. The coefficient of thermal expansion (CTE) values of the core panels can be tailored to decrease warpage of the package as the semiconductor chip heats during use.

公开(公告)号：US12027453B2

公开(公告)日：2024-07-02

申请号：US17433801

申请日：2020-02-26

Applicant: GEORGIA TECH RESEARCH CORPORATION

Inventor： Nobuo Ogura ,  Siddharth Ravichandran ,  Venkatesh V. Sundaram ,  Rao R. Tummala

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/49822 ,  H01L21/4803 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49827 ,  H01L23/562

Abstract: The present disclosure describes semiconductor packages and, more particularly, chip-embedded semiconductor packages. The packages include core panels with apertures extending through the core panel. Semiconductor chips are embedded within chip apertures. A molding compound can be positioned along one side of the core panel. In some examples, the semiconductor chips are embedded within the molding compound. In other examples, the semiconductor chips are adhered to the molding compound. The coefficient of thermal expansion (CTE) values of the core panels described herein can be tailored to decrease warpage of the package as the semiconductor chip heats during use.