公开(公告)号：US09269611B2

公开(公告)日：2016-02-23

申请号：US14159944

申请日：2014-01-21

申请人： GLOBALFOUNDRIES, Inc. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Daniel Thanh Khae Pham ,  Xiuyu Cai ,  Bala Subramanian Pranatharthi Haran ,  Charan Veera Venkata Satya Surisetty ,  Jin Wook Lee ,  Shom Ponoth ,  David V. Horak

IPC分类号： H01L29/78 ,  H01L21/768

CPC分类号： H01L21/76816 ,  H01L21/28247 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76877 ,  H01L21/76897 ,  H01L29/66545 ,  H01L2924/0002 ,  H01L2924/00

摘要： Integrated circuits and methods of forming integrated circuits are provided. An integrated circuit includes a gate electrode structure overlying a base substrate. The gate electrode structure includes a gate electrode, with a cap disposed over the gate electrode and sidewall spacers disposed adjacent to sidewalls of the gate electrode structure. A source and drain region are formed in the base substrate aligned with the gate electrode structure. A first dielectric layer is disposed adjacent to the sidewall spacers. The sidewall spacers and the cap have recessed surfaces below a top surface of the first dielectric layer, and a protecting layer is disposed over the recessed surfaces. A second dielectric layer is disposed over the first dielectric layer and the protecting layer. Electrical interconnects are disposed through the first dielectric layer and the second dielectric layer, and the electrical interconnects are in electrical communication with the respective source and drain regions.

摘要翻译： 提供了形成集成电路的集成电路和方法。 集成电路包括覆盖基底的栅电极结构。 栅极电极结构包括栅电极，栅极设置在栅电极上，侧壁间隔件邻近栅电极结构的侧壁设置。 源极和漏极区域形成在与栅电极结构对准的基底衬底中。 第一电介质层设置成与侧壁间隔物相邻。 侧壁间隔件和盖在第一电介质层的顶表面下方具有凹陷表面，并且保护层设置在凹入表面之上。 第二电介质层设置在第一电介质层和保护层之上。 电互连通过第一介电层和第二介电层设置，并且电互连与相应的源区和漏区电连通。

公开(公告)号：US20150206844A1

公开(公告)日：2015-07-23

申请号：US14159944

申请日：2014-01-21

申请人： International Business Machines Corporation ,  Globalfoundries, Inc.

发明人： Daniel Thanh Khae Pham ,  Xiuyu Cai ,  Bala Subramanian Pranatharthi Haran ,  Charan Veera Venkata Satya Surisetty ,  Jin Wook Lee ,  Shom Ponoth ,  David V. Horak

IPC分类号： H01L23/532 ,  H01L21/768 ,  H01L23/528 ,  H01L27/06

CPC分类号： H01L21/76816 ,  H01L21/28247 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76877 ,  H01L21/76897 ,  H01L29/66545 ,  H01L2924/0002 ,  H01L2924/00

摘要： Integrated circuits and methods of forming integrated circuits are provided. An integrated circuit includes a gate electrode structure overlying a base substrate. The gate electrode structure includes a gate electrode, with a cap disposed over the gate electrode and sidewall spacers disposed adjacent to sidewalls of the gate electrode structure. A source and drain region are formed in the base substrate aligned with the gate electrode structure. A first dielectric layer is disposed adjacent to the sidewall spacers. The sidewall spacers and the cap have recessed surfaces below a top surface of the first dielectric layer, and a protecting layer is disposed over the recessed surfaces. A second dielectric layer is disposed over the first dielectric layer and the protecting layer. Electrical interconnects are disposed through the first dielectric layer and the second dielectric layer, and the electrical interconnects are in electrical communication with the respective source and drain regions.

摘要翻译： 提供了形成集成电路的集成电路和方法。 集成电路包括覆盖基底的栅电极结构。 栅极电极结构包括栅电极，栅极设置在栅电极上，侧壁间隔件邻近栅电极结构的侧壁设置。 源极和漏极区域形成在与栅电极结构对准的基底衬底中。 第一电介质层设置成与侧壁间隔物相邻。 侧壁间隔件和盖在第一电介质层的顶表面下方具有凹陷表面，并且保护层设置在凹入表面之上。 第二电介质层设置在第一电介质层和保护层之上。 电互连通过第一介电层和第二介电层设置，并且电互连与相应的源区和漏区电连通。