公开(公告)号：US09917103B1

公开(公告)日：2018-03-13

申请号：US15397978

申请日：2017-01-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： George R. Mulfinger ,  Jin Z. Wallner

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/06 ,  H01L21/762 ,  H01L21/84 ,  H01L29/417 ,  H01L29/40

CPC classification number: H01L27/1203 ,  H01L21/76224 ,  H01L21/84 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/78654

Abstract: Methods of forming a diffusion break are disclosed. The method includes forming a diffusion break after source/drain formation, by removing a gate stack of the dummy gate to a buried insulator of an SOI substrate, creating a first opening; and filling the first opening with a dielectric to form the diffusion break. An IC structure includes the diffusion break in contact with an upper surface of the buried insulator. In an optional embodiment, the method may also include simultaneously forming an isolation in an active gate to an STI in the SOI substrate.

公开(公告)号：US09899257B1

公开(公告)日：2018-02-20

申请号：US15448873

申请日：2017-03-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jin Z. Wallner ,  Haoren Zhuang

IPC: H01L21/768 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/285 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L23/535

CPC classification number: H01L21/76829 ,  H01L21/28518 ,  H01L21/76283 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/535 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0847

Abstract: A method of forming a shallow trench isolation (STI) in a semiconductor-on-insulator (SOI) substrate, including an etch stop liner, to mitigate punch through in SOI substrates is disclosed. The method may include providing an SOI substrate, forming an STI recess within the SOI substrate, forming a first STI dielectric fill within the STI recess wherein a top surface of the first STI dielectric fill is at a location above a top surface of the base substrate, forming a first etch stop liner on the first STI dielectric fill, and forming a second STI dielectric fill over the first etch stop liner. The first etch stop liner is configured so that portion of a contact opening later formed is positioned over the first etch stop liner such that the etch stop liner prevents punch through into the STI. The method may also include forming a second etch stop liner after forming the STI recess and before forming the first STI dielectric fill.