Integrated multiple gate length semiconductor device including self-aligned contacts
    1.
    发明授权
    Integrated multiple gate length semiconductor device including self-aligned contacts 有权
    集成多栅长半导体器件包括自对准触点

    公开(公告)号:US09466680B2

    公开(公告)日:2016-10-11

    申请号:US14825375

    申请日:2015-08-13

    Abstract: A multi-channel semiconductor device includes a first and second gate channels formed in a semiconductor substrate. The first gate channel has a first length and the second gate channel has a second length greater than the first length. A gate dielectric layer is formed in the first and second gate channels. A first plurality of work function metal layers is formed on the gate dielectric layer of the first gate channel. A second plurality of work function metal layers is formed on the gate dielectric layer of the second gate channel. A barrier layer is formed on each of the first and second plurality of work function metal layers, and the gate dielectric layer. The multi-channel semiconductor device further includes metal gate stacks formed on of the barrier layer such that the barrier layer is interposed between the metal gate stacks and the gate dielectric layer.

    Abstract translation: 多沟道半导体器件包括形成在半导体衬底中的第一和第二栅极沟道。 第一栅极沟道具有第一长度,并且第二栅极沟道具有大于第一长度的第二长度。 在第一和第二栅极通道中形成栅极电介质层。 在第一栅极沟道的栅介质层上形成第一多个功函数金属层。 在第二栅极沟道的栅极介电层上形成第二多个功函数金属层。 在第一和第二多个功函数金属层和栅介质层中的每一个上形成阻挡层。 多沟道半导体器件还包括形成在阻挡层上的金属栅极堆叠,使得阻挡层插入在金属栅极堆叠和栅极电介质层之间。

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