公开(公告)号：US10566201B1

公开(公告)日：2020-02-18

申请号：US16174510

申请日：2018-10-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Chanro Park ,  Ruilong Xie ,  Hui Zang ,  Laertis Economikos ,  Andre LaBonte

IPC: H01L21/28 ,  H01L21/8234 ,  H01L21/3213 ,  H01L27/088 ,  H01L29/423 ,  H01L23/535 ,  H01L29/66

Abstract: A method that includes forming a conductive source/drain structure that is conductively coupled to source/drain regions of first and second transistor devices, selectively forming a conductive source/drain metallization cap structure on and in contact with an upper surface of the conductive source/drain structure, forming a patterned etch mask that exposes a portion of the gate cap and a portion of the conductive source/drain metallization cap structure, and performing at least one etching process to remove the exposed portion of the gate cap and thereafter an exposed portion of the final gate structure so as to form a gate cut opening, wherein the conductive source/drain metallization cap structure protects the underlying conductive source/drain structure during the at least one etching process.