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公开(公告)号：US20160133740A1
公开(公告)日：2016-05-12
申请号：US14983217
申请日：2015-12-29
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Bartlomiej Jan Pawlak , Behtash Behin-Aein , Mehdi Salmani-Jelodar
IPC: H01L29/78 , H01L29/201 , H01L29/10 , H01L29/161
CPC classification number: H01L29/785 , H01L21/02381 , H01L21/02532 , H01L29/1033 , H01L29/1054 , H01L29/161 , H01L29/201 , H01L29/66795 , H01L29/6681
Abstract: One illustrative device disclosed herein includes, among other things, a substrate made of a first semiconductor material, at least one layer of insulating material positioned above the substrate, a fin structure positioned above the layer of insulating material and the substrate, the fin structure comprising first, second and third layers of semiconductor material, wherein the semiconductor materials of the first, second and third layers are different than the first semiconductor material, and a gate structure around a portion of the fin structure comprised of the first, second and third layers of semiconductor material.
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2.发明申请METHODS OF FORMING A CHANNEL REGION FOR A SEMICONDUCTOR DEVICE BY PERFORMING A TRIPLE CLADDING PROCESS 有权通过执行三重切割工艺形成半导体器件的通道区域的方法公开(公告)号：US20160005834A1
公开(公告)日：2016-01-07
申请号：US14322987
申请日：2014-07-03
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Bartlomiej Jan Pawlak , Behtash Behin-Aein , Mehdi Salmani-Jelodar
CPC classification number: H01L29/785 , H01L21/02381 , H01L21/02532 , H01L29/1033 , H01L29/1054 , H01L29/161 , H01L29/201 , H01L29/66795 , H01L29/6681
Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches that define a fin, performing a plurality of epitaxial deposition processes to form first, second and third layers of epi semiconductor material around an exposed portion of the fin, removing the first, second and third layers of epi semiconductor material from above an upper surface of the fin so as to thereby expose the fin, selectively removing the fin relative to the first, second and third layers of epi semiconductor material so as to thereby define two fin structures comprised of the first, second and third layers of epi semiconductor material, and forming a gate structure around a portion of at least one of the fin structures comprised of the first, second and third layers of epi semiconductor material.
Abstract translation: 本文公开的一种说明性方法包括形成限定翅片的多个沟槽，执行多个外延沉积工艺以在翅片的暴露部分周围形成第一，第二和第三层外延半导体材料，除去 第一层，第二层和第三层外延半导体材料，从翅片的上表面上方，从而露出翅片，相对于第一，第二和第三层外延半导体材料选择性地去除翅片，从而限定两个鳍 由第一层，第二层和第三层外延半导体材料构成的结构，以及围绕由第一，第二和第三层外延半导体材料构成的至少一个鳍结构的一部分形成栅极结构。
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公开(公告)号：US09716177B2
公开(公告)日：2017-07-25
申请号：US14983217
申请日：2015-12-29
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Bartlomiej Jan Pawlak , Behtash Behin-Aein , Mehdi Salmani-Jelodar
IPC: H01L29/78 , H01L29/10 , H01L29/16 , H01L29/20 , H01L29/66 , H01L21/02 , H01L29/161 , H01L29/201
CPC classification number: H01L29/785 , H01L21/02381 , H01L21/02532 , H01L29/1033 , H01L29/1054 , H01L29/161 , H01L29/201 , H01L29/66795 , H01L29/6681
Abstract: The device disclosed herein includes, among other things, a substrate made of a first semiconductor material, at least one layer of insulating material positioned above the substrate, a fin structure positioned above the layer of insulating material and the substrate, the fin structure including first, second and third layers of semiconductor material, wherein the semiconductor materials of the first, second and third layers are different than the first semiconductor material, and a gate structure around a portion of the fin structure includes the first, second and third layers of semiconductor material.
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4.发明授权Methods of forming a channel region for a semiconductor device by performing a triple cladding process 有权通过执行三重包层工艺形成用于半导体器件的沟道区域的方法公开(公告)号：US09263555B2
公开(公告)日：2016-02-16
申请号：US14322987
申请日：2014-07-03
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Bartlomiej Jan Pawlak , Behtash Behin-Aein , Mehdi Salmani-Jelodar
CPC classification number: H01L29/785 , H01L21/02381 , H01L21/02532 , H01L29/1033 , H01L29/1054 , H01L29/161 , H01L29/201 , H01L29/66795 , H01L29/6681
Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches that define a fin, performing a plurality of epitaxial deposition processes to form first, second and third layers of epi semiconductor material around an exposed portion of the fin, removing the first, second and third layers of epi semiconductor material from above an upper surface of the fin so as to thereby expose the fin, selectively removing the fin relative to the first, second and third layers of epi semiconductor material so as to thereby define two fin structures comprised of the first, second and third layers of epi semiconductor material, and forming a gate structure around a portion of at least one of the fin structures comprised of the first, second and third layers of epi semiconductor material.
Abstract translation: 本文公开的一种说明性方法包括形成限定翅片的多个沟槽，执行多个外延沉积工艺以在翅片的暴露部分周围形成第一，第二和第三层外延半导体材料，除去 第一层，第二层和第三层外延半导体材料，从翅片的上表面上方，从而露出翅片，相对于第一，第二和第三层外延半导体材料选择性地去除翅片，从而限定两个鳍 由第一层，第二层和第三层外延半导体材料构成的结构，以及围绕由第一，第二和第三层外延半导体材料构成的至少一个鳍结构的一部分形成栅极结构。
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