公开(公告)号：US10050118B2

公开(公告)日：2018-08-14

申请号：US14269566

申请日：2014-05-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Ryan Ryoung-han Kim ,  Chanro Park ,  William James Taylor, Jr. ,  John A. Iacoponi

IPC: H01L29/66 ,  H01L21/336 ,  H01L29/06 ,  H01L29/78

Abstract: In one aspect a semiconductor device as set forth herein can include a spacer having a first section of a first material and a second section of a second material, the second section disposed above a certain elevation and the first section disposed below the certain elevation. In one aspect a semiconductor device as set forth herein can include a conductive gate structure having a first length at elevations below a certain elevation and a second length at elevations above the certain elevation, the second length being less than the first length. A semiconductor device having one or more of a plural material spacer or a reduced length upper elevation conductive gate structure can feature a reduced likelihood of electrical shorting.