公开(公告)号：US09666709B2

公开(公告)日：2017-05-30

申请号：US14609105

申请日：2015-01-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xiaoli He ,  Yanxiang Liu ,  Jerome Ciavatti ,  Myung Hee Nam

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/739 ,  H01L21/033 ,  H01L21/32

CPC classification number: H01L29/7816 ,  H01L21/0332 ,  H01L21/32 ,  H01L29/0653 ,  H01L29/0882 ,  H01L29/1037 ,  H01L29/41775 ,  H01L29/66356 ,  H01L29/66545 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7391 ,  H01L29/7835

Abstract: A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain in each drain well. The structure further includes an isolation region in each drain well adjacent the drain, each isolation region reaching to a top surface of the corresponding raised structure, and a conductive center gate on each raised structure, the conductive center gate covering a top surface, a front surface and a back surface thereof, and covering a portion of the isolation region opposite the drain. The isolation regions in the drain wells reaching to the raised structure top surface is a result of preserving the isolation region by covering it during fabrication with an HDP oxide to prevent partial removal.