DEVICE OVER PATTERNED BURIED POROUS LAYER OF SEMICONDUCTOR MATERIAL

    公开(公告)号:US20240006524A1

    公开(公告)日:2024-01-04

    申请号:US17852873

    申请日:2022-06-29

    CPC classification number: H01L29/7786 H01L29/2003 H01L29/66462

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a patterned buried porous layer of semiconductor material and a device over the patterned buried porous layer, and methods of manufacture. The structure includes: a semiconductor substrate includes a patterned buried porous layer within the semiconductor substrate; a semiconductor compound material over the semiconductor substrate and the patterned buried porous layer; and at least one device on the semiconductor compound material. The non-patterned portions of the semiconductor substrate provide a thermal pathway within the semiconductor substrate.

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