公开(公告)号：US20230238428A1

公开(公告)日：2023-07-27

申请号：US17582550

申请日：2022-01-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： Rong-Ting Liou ,  Man Gu ,  Jeffrey B. Johnson ,  Wang Zheng ,  Jagar Singh ,  Haiting Wang

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762

CPC classification number: H01L29/0653 ,  H01L29/7816 ,  H01L29/66681 ,  H01L21/76224

Abstract: An IC structure that includes a trench isolation (TI) in a substrate having three portions of different dielectric materials. The portions may also have different widths. The TI may include a lower portion including a first dielectric material and having a first width, a middle portion including the first dielectric material and an outer second dielectric material, and an upper portion including a third dielectric material and having a second width greater than the first width. The first, second and third dielectric materials are different.

公开(公告)号：US20210351293A1

公开(公告)日：2021-11-11

申请号：US16870356

申请日：2020-05-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Wang Zheng ,  Rong-Ting Liou ,  Haiting Wang ,  Wenjun Li

IPC: H01L29/78 ,  H01L29/66

Abstract: A device is disclosed that includes a source region positioned in a first doped well region in a semiconductor substrate and a drain region positioned in a second doped well region in the substrate, wherein there is a well gap between the first doped well region and the second doped well region. The device also includes a gate structure that includes a first gate insulation layer positioned above an upper surface of the substrate, wherein the first gate insulation layer extends from a drain-side sidewall of the gate structure to a location above the well gap, and a second gate insulation layer having a first portion positioned above the upper surface of the substrate and a second portion positioned above the first gate insulation layer.