公开(公告)号：US11532745B2

公开(公告)日：2022-12-20

申请号：US16806319

申请日：2020-03-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Wenjun Li

IPC: H01L29/772 ,  H01L29/78 ,  H01L29/66 ,  H01L29/165

Abstract: Integrated circuit (IC) structures including asymmetric, recessed source and drain regions and methods for forming are provided. In an example, the IC structure includes a substrate, a gate structure over the substrate, first and second spacers contacting respective, opposite sidewalls of the gate structure, and source and drain regions on opposite sides of the gate structure. In one configuration, the source region includes an upper source portion having a first lateral width, and a lower source portion having a second lateral width greater than the first lateral width, and the drain region includes an upper drain portion having a third lateral width, and a lower drain portion having a fourth lateral width that is substantially the same as the third lateral width.

公开(公告)号：US11101364B2

公开(公告)日：2021-08-24

申请号：US16296769

申请日：2019-03-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： George R. Mulfinger ,  Hong Yu ,  Man Gu ,  Jianwei Peng ,  Michael Aquilino

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/311

Abstract: Structures for a field-effect transistor and methods of forming a field-effect transistor. A gate structure of the field-effect transistor is arranged over an active region comprised of a semiconductor material. A first sidewall spacer is arranged adjacent to the gate structure. A second sidewall spacer includes a section arranged between the first sidewall spacer and the active region. The first sidewall spacer is composed of a low-k dielectric material.

公开(公告)号：US20230238428A1

公开(公告)日：2023-07-27

申请号：US17582550

申请日：2022-01-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： Rong-Ting Liou ,  Man Gu ,  Jeffrey B. Johnson ,  Wang Zheng ,  Jagar Singh ,  Haiting Wang

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762

CPC classification number: H01L29/0653 ,  H01L29/7816 ,  H01L29/66681 ,  H01L21/76224

Abstract: An IC structure that includes a trench isolation (TI) in a substrate having three portions of different dielectric materials. The portions may also have different widths. The TI may include a lower portion including a first dielectric material and having a first width, a middle portion including the first dielectric material and an outer second dielectric material, and an upper portion including a third dielectric material and having a second width greater than the first width. The first, second and third dielectric materials are different.

公开(公告)号：US20220005954A1

公开(公告)日：2022-01-06

申请号：US16919225

申请日：2020-07-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Wenjun Li ,  Sudarshan Narayanan

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66

Abstract: An integrated circuit (IC) structure includes a semiconductor fin having a first longitudinal extent and a second longitudinal extent. The semiconductor fin has an upper fin portion having a uniform lateral dimension in the first longitudinal extent and the second longitudinal extent, a first subfin portion under the upper fin portion in the first longitudinal extent having a first lateral dimension, and a second subfin portion under the upper fin portion in the second longitudinal extent having a second lateral dimension different than the first lateral dimension. The second subfin may be used in a drain extension region of a laterally-diffused metal-oxide semiconductor (LDMOS) device. The second subfin reduces subfin current and improves HCI reliability, regardless of the type of LDMOS device.

公开(公告)号：US20210249307A1

公开(公告)日：2021-08-12

申请号：US16783741

申请日：2020-02-06

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Wenjun Li

IPC: H01L21/8234 ,  H01L29/78 ,  H01L27/088 ,  H01L29/08

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. First and second gate structures extend over a semiconductor body. The first gate structure includes a first sidewall and a second sidewall opposite the first sidewall, and the second gate structure includes a sidewall adjacent to the first sidewall of the first gate structure. A first source/drain region includes a first epitaxial semiconductor layer positioned between the first sidewall of the first gate structure and the sidewall of the second gate structure. A second source/drain region includes a second epitaxial semiconductor layer positioned adjacent to the second sidewall of the first gate structure. The first sidewall of the first gate structure and the sidewall of the second gate structure are separated by a distance that is greater than a width of the first epitaxial semiconductor layer.

公开(公告)号：US10971625B2

公开(公告)日：2021-04-06

申请号：US16458178

申请日：2019-06-30

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Michael V Aquilino ,  Daniel Jaeger ,  Man Gu ,  Bradley Morgenfeld ,  Haiting Wang ,  Kavya Sree Duggimpudi ,  Wang Zheng

IPC: H01L29/08 ,  H01L27/112 ,  H01L29/78 ,  H01L21/822 ,  H01L29/66

Abstract: A semiconductor device is provided, which includes an array of active regions, gate stacks and substantially uniform epitaxial structures. The gate stacks of the array include a first gate stack and a second gate stack over an active region. An active pillar between the first gate stack and the second gate stack, and the active pillar separating two substantially uniform epitaxial structures. A contact structure over the active pillar, positioned equidistant from the first gate stack and the second gate stack.

公开(公告)号：US20240030343A1

公开(公告)日：2024-01-25

申请号：US17814611

申请日：2022-07-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： Saloni Chaurasia ,  Man Gu ,  Jagar Singh

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/51

CPC classification number: H01L29/7835 ,  H01L29/0847 ,  H01L29/517

Abstract: A transistor structure includes a semiconductor substrate with a source region and a drain region therein that are asymmetric. A gate dielectric structure includes a first gate oxide region over a portion of the source region, a second gate oxide region over a portion of the drain region, and a high dielectric constant (high-K) dielectric layer contacting the semiconductor substrate and separating the first gate oxide region from the second gate oxide region. A gate body is over the gate dielectric structure.

公开(公告)号：US11843034B2

公开(公告)日：2023-12-12

申请号：US17529002

申请日：2021-11-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Haiting Wang ,  Jagar Singh

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/735 ,  H01L29/423

CPC classification number: H01L29/1008 ,  H01L29/42304 ,  H01L29/6625 ,  H01L29/735

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes a lateral bipolar junction transistor including an extrinsic base region and a bilayer dielectric spacer on sidewalls of the extrinsic base region, and a p-n junction positioned under the bilayer dielectric spacer between the extrinsic base region and at least an emitter region.

公开(公告)号：US11721722B2

公开(公告)日：2023-08-08

申请号：US17524438

申请日：2021-11-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Man Gu ,  Jagar Singh ,  Haiting Wang ,  Jeffrey Johnson

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/735 ,  H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1008 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737 ,  H01L29/7842

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a collector having a raised portion, an emitter having a raised portion, and a base laterally arranged between the raised portion of the emitter and the raised portion of the collector. The base includes an intrinsic base layer and an extrinsic base layer stacked with the intrinsic base layer. The structure further includes a stress liner positioned to overlap with the raised portion of the collector, the raised portion of the emitter, and the extrinsic base layer.

公开(公告)号：US11374002B2

公开(公告)日：2022-06-28

申请号：US16937821

申请日：2020-07-24

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Wenjun Li ,  Man Gu

IPC: H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A semiconductor substrate includes a first region, a second region, and a first source/drain region in the first region. A semiconductor fin is located over the second region of the semiconductor substrate. The semiconductor fin extends laterally along a longitudinal axis to connect to the first region of the semiconductor substrate. The structure includes a second source/drain region including an epitaxial semiconductor layer coupled to the first semiconductor fin, and a gate structure that extends over the semiconductor fin. The gate structure includes a first sidewall and a second sidewall opposite the first sidewall, the first source/drain region is positioned adjacent to the first sidewall of the gate structure, and the second source/drain region is positioned adjacent to the second sidewall of the gate structure.