-
公开(公告)号：US11848374B2
公开(公告)日：2023-12-19
申请号：US17574785
申请日：2022-01-13
发明人： Shesh Mani Pandey , Jagar Singh , Judson Holt
IPC分类号： H01L29/737 , H01L29/66 , H01L21/762 , H01L29/06
CPC分类号： H01L29/737 , H01L21/76289 , H01L29/0649 , H01L29/66242
摘要： Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a dielectric layer having a cavity, a first semiconductor layer on the dielectric layer, a collector including a portion on the first semiconductor layer, an emitter including a portion on the first semiconductor layer, and a second semiconductor layer that includes a first section in the cavity and a second section. The second section of the second semiconductor layer is laterally positioned between the portion of the collector and the portion of the emitter.
-
公开(公告)号：US11837653B2
公开(公告)日：2023-12-05
申请号：US17555561
申请日：2021-12-20
IPC分类号： H01L29/73 , H01L29/737 , H01L29/08 , H01L29/66 , H01L29/10
CPC分类号： H01L29/737 , H01L29/0821 , H01L29/1008 , H01L29/6625 , H01L29/66242
摘要： Disclosed is a semiconductor structure with a lateral bipolar junction transistor (BJT). This semiconductor structure can be readily integrated into advanced silicon-on-insulator (SOI) technology platforms. Furthermore, to maintain or improve upon performance characteristics (e.g., cut-off frequency (fT)/maximum oscillation frequency (fmax) and beta cut-off frequency) that would otherwise be negatively impacted due to changing of the orientation of the BJT from vertical to lateral, the semiconductor structure can further include a dielectric stress layer (e.g., a tensilely strained layer in the case of an NPN-type transistor or a compressively strained layer in the case of a PNP-type transistor) partially covering the lateral BJT for charge carrier mobility enhancement and the lateral BJT can be configured as a lateral heterojunction bipolar transistor (HBT). Also disclosed is a method for forming the semiconductor structure.
-
公开(公告)号：US11810969B2
公开(公告)日：2023-11-07
申请号：US17509384
申请日：2021-10-25
发明人： Haiting Wang , Alexander Derrickson , Jagar Singh , Vibhor Jain , Andreas Knorr , Alexander Martin , Judson R. Holt , Zhenyu Hu
IPC分类号： H01L29/735 , H01L29/66 , H01L29/737 , H01L29/08 , H01L29/417
CPC分类号： H01L29/735 , H01L29/0808 , H01L29/0821 , H01L29/41708 , H01L29/6625 , H01L29/737
摘要： The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.
-
4.发明授权公开(公告)号：US11784224B2
公开(公告)日：2023-10-10
申请号：US17455290
申请日：2021-11-17
发明人： Hong Yu , Jagar Singh , Zhenyu Hu , John J. Pekarik
IPC分类号： H01L29/10 , H01L29/417 , H01L29/423 , H01L29/40 , H01L29/737 , H01L29/66 , H01L29/735 , H01L29/08
CPC分类号： H01L29/1008 , H01L29/0808 , H01L29/0821 , H01L29/401 , H01L29/41708 , H01L29/42304 , H01L29/6625 , H01L29/66242 , H01L29/735 , H01L29/737
摘要： The disclosure provides a lateral bipolar transistor structure with a base layer over a semiconductor buffer, and related methods. A lateral bipolar transistor structure may include an emitter/collector (E/C) layer over an insulator. The E/C layer has a first doping type. A semiconductor buffer is adjacent the insulator. A base layer is on the semiconductor buffer and adjacent the E/C layer, the base layer including a lower surface below the E/C layer and an upper surface above the E/C layer. The base layer has a second doping type opposite the first doping type.
-
5.发明公开公开(公告)号：US20230238428A1
公开(公告)日：2023-07-27
申请号：US17582550
申请日：2022-01-24
发明人： Rong-Ting Liou , Man Gu , Jeffrey B. Johnson , Wang Zheng , Jagar Singh , Haiting Wang
IPC分类号： H01L29/06 , H01L29/78 , H01L29/66 , H01L21/762
CPC分类号： H01L29/0653 , H01L29/7816 , H01L29/66681 , H01L21/76224
摘要： An IC structure that includes a trench isolation (TI) in a substrate having three portions of different dielectric materials. The portions may also have different widths. The TI may include a lower portion including a first dielectric material and having a first width, a middle portion including the first dielectric material and an outer second dielectric material, and an upper portion including a third dielectric material and having a second width greater than the first width. The first, second and third dielectric materials are different.
-
公开(公告)号：US20210399116A1
公开(公告)日：2021-12-23
申请号：US16907600
申请日：2020-06-22
发明人： Jagar Singh , Sudarshan Narayanan , Alvin J. Joseph , William J. Taylor, JR. , Jeffrey B. Johnson
摘要： A structure includes a first source/drain region and a second source/drain region in a semiconductor body; and a trench isolation between the first and second source/drain regions in the semiconductor body. A first doping region is about the first source/drain region, a second doping region about the second source/drain region, and the trench isolation is within the second doping region. A third doping region is adjacent to the first doping region and extend partially into the second doping region to create a charge trap section. A gate conductor of a gate structure is over the trench isolation and the first, second, and third doping regions. The charge trap section creates a charge controlled e-fuse operable by applying a stress voltage to the gate conductor.
-
公开(公告)号：US11164978B2
公开(公告)日：2021-11-02
申请号：US16774482
申请日：2020-01-28
发明人： Jagar Singh , Sudarshan Narayanan
IPC分类号： H01L29/861 , H01L27/08 , H01L29/06 , H01L29/08
摘要： A device includes a substrate having a top surface and a bottom surface. A first doping well having a first part and a second part is located in the substrate. An undoped moat is in the substrate between the first doping well and a second doping well. A diode includes an anode with an increased first doping concentration region in the first doping well and a cathode with an increased second doping concentration region in the second doping well. An isolation region is in the first doping well having a first portion proximate the top surface and a second portion distal to the top surface. A gap made of an undoped region is in the first doping well between the first part and the second part. The gap is located between the distal portion of the isolation region and the bottom surface of the substrate.
-
公开(公告)号：US20210234052A1
公开(公告)日：2021-07-29
申请号：US16774482
申请日：2020-01-28
发明人： Jagar Singh , Sudarshan Narayanan
IPC分类号： H01L29/861 , H01L29/08 , H01L29/06 , H01L27/08
摘要： A device includes a substrate having a top surface and a bottom surface. A first doping well having a first part and a second part is located in the substrate. An undoped moat is in the substrate between the first doping well and a second doping well. A diode includes an anode with an increased first doping concentration region in the first doping well and a cathode with an increased second doping concentration region in the second doping well. An isolation region is in the first doping well having a first portion proximate the top surface and a second portion distal to the top surface. A gap made of an undoped region is in the first doping well between the first part and the second part. The gap is located between the distal portion of the isolation region and the bottom surface of the substrate.
-
公开(公告)号：US12074211B2
公开(公告)日：2024-08-27
申请号：US17872790
申请日：2022-07-25
发明人： Jagar Singh
IPC分类号： H01L29/735 , H01L29/08 , H01L29/10
CPC分类号： H01L29/735 , H01L29/0808 , H01L29/0821 , H01L29/1008
摘要： The present disclosure relates to semiconductor structures and, more particularly, to bipolar transistors and methods of manufacture. The structure includes: an emitter in a semiconductor substrate; a collector in the semiconductor substrate; a base contact region in the semiconductor substrate and adjacent to the collector and the emitter; and a shallow trench isolation structure overlapping the base contact region and separating the base contact region from the emitter and the collector.
-
公开(公告)号：US20240145382A1
公开(公告)日：2024-05-02
申请号：US18051037
申请日：2022-10-31
发明人： Ravi P. Srivastava , Jagar Singh
IPC分类号： H01L23/522 , H01L21/768 , H01L23/00 , H01L23/48 , H01L49/02
CPC分类号： H01L23/5227 , H01L21/76898 , H01L23/481 , H01L24/08 , H01L24/80 , H01L28/10 , H01L2224/08146 , H01L2224/80895 , H01L2224/80896
摘要： Disclosed is a structure and a method of forming the structure. The structure includes first and second semiconductor substrates with adjacent surfaces (e.g., bonded surfaces), a first spiral-shape metallic feature in the first semiconductor substrate, and a second spiral-shaped metallic feature in the second semiconductor substrate. The second spiral-shaped metallic feature is aligned above and electrically connected to the first spiral-shaped metallic feature. In some embodiments, the second spiral-shaped metallic feature is stacked on and immediately adjacent to the first spiral-shaped metallic feature at the bonded surfaces, thereby forming a relatively large inductor with high Qdc in a relatively small area. In other embodiments, the first and second spiral-shaped metallic features are discrete inductors located on opposite sides of the semiconductor substrates from the bonded surfaces but electrically connected in parallel (e.g., using stacked TSVs), effectively forming a relatively large inductor with a high Qdc in a relatively small area.
-
-
-
-
-
-
-
-
-
搜索结果
61 条记录 (耗时 0.021 秒)
