公开(公告)号：US10514914B2

公开(公告)日：2019-12-24

申请号：US15688895

申请日：2017-08-29

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F9/30 ,  G11C15/04 ,  G11C7/10 ,  G06F12/1027

摘要： A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.

公开(公告)号：US11860885B2

公开(公告)日：2024-01-02

申请号：US17189316

申请日：2021-03-02

申请人： GSI Technology Inc.

发明人： Moshe Lazer ,  Eli Ehrman

IPC分类号： G06F7/00 ,  G06F16/2458 ,  G06F16/28 ,  G06F16/22 ,  G06F16/245

CPC分类号： G06F16/2465 ,  G06F16/2237 ,  G06F16/245 ,  G06F16/283

摘要： An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.

公开(公告)号：US20190065186A1

公开(公告)日：2019-02-28

申请号：US15688895

申请日：2017-08-29

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F9/30

摘要： A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.

公开(公告)号：US10942736B2

公开(公告)日：2021-03-09

申请号：US16714847

申请日：2019-12-16

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F9/30 ,  G11C15/04 ,  G11C7/10 ,  G06F12/1027

摘要： A method for finding an extreme value among a plurality of numbers in an associative memory includes creating a spread-out representation (SOR) for each number of the plurality of numbers, storing each SOR in a column of the associative memory array and performing a horizontal bit-wise Boolean operation on rows of the associative memory array to produce an extreme SOR (ESOR) having the extreme value. A system for finding an extreme value includes an associative memory array to store the plurality of numbers, each number storable in a column; a spread-out representation (SOR) creator to create a SOR for each number of the plurality of numbers and to store each SOR in a column of the associative memory array, and an extreme SOR (ESOR) finder to find an extreme value using a horizontal bit-wise Boolean operation on rows of the associative memory array storing bits of the SORs.

公开(公告)号：US20190278566A1

公开(公告)日：2019-09-12

申请号：US15915113

申请日：2018-03-08

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F7/533 ,  G06F7/501

摘要： A method for an associative memory device includes replacing a set of three multi-bit binary numbers P, Q and R, stored in the associative memory device, with two multi-bit binary numbers X and Y, also stored in the associative memory device, wherein a sum of the binary numbers P, Q and R is equal to a sum of the binary numbers X and Y. A system includes an associative memory array having rows and columns and a multi-bit multiplier. Each column of the array stores two multi-bit binary numbers to be multiplied. The multi-bit multiplier multiplies, in parallel, the two multi-bit binary numbers per column by concurrently processing all bits of partial products generated by the multiplier. The multiplier performs the processing without any carry propagation delay when adding all but the last two partial products.

公开(公告)号：US20190065558A1

公开(公告)日：2019-02-28

申请号：US15690305

申请日：2017-08-30

申请人： GSI Technology Inc.

发明人： Moshe Lazer ,  Eli EHRMAN

IPC分类号： G06F17/30

摘要： A method and a system for selecting items one by one from a set of items in an associative memory array includes determining a density of the set, if the density is sparse, repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set, and if the density is not sparse, performing a next index select (NIS) method to create a linked list of the elected items and to repeatedly select a next elected item from the set. An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.

公开(公告)号：US11755240B1

公开(公告)日：2023-09-12

申请号：US17678073

申请日：2022-02-23

申请人： GSI Technology Inc.

发明人： Moshe Lazer ,  Eyal Amiel

IPC分类号： G06F3/06

CPC分类号： G06F3/0655 ,  G06F3/0604 ,  G06F3/0673

摘要： A method for an associative memory device includes storing a plurality of pairs of multi-bit operands X and Y in rows of a memory array of the associative memory device, each pair in a different column of the memory array. Cells in a column are connected by a first bit-line providing a value of activated cells and a second bit-line providing an inverse value of the activated cells. The bits of X are stored in first rows and the bits of Y are stored in second rows. The method includes reading an inverse value of a bit stored in each of the second rows using the second bit-line, writing it to third rows and concurrently, on all columns, performing multi-bit add operations between a value of X, an inverse value of Y and a carry-in bit initiated to 1, providing the difference between X and Y in each of the columns.

公开(公告)号：US11681497B2

公开(公告)日：2023-06-20

申请号：US17086506

申请日：2020-11-02

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F7/508 ,  G11C7/10 ,  G11C15/04 ,  G06F12/02

CPC分类号： G06F7/508 ,  G11C7/1006 ,  G11C15/04 ,  G06F12/0207 ,  G06F2207/4804 ,  G06F2207/5063

摘要： A method for an associative memory device includes storing a plurality of pairs of N-bit numbers A and B to be added together in columns of a memory array of the associative memory device, each pair in a column, each bit in a row of the column, and dividing each N-bit number A and B into groups containing M bits each, having group carry-out predictions for every group except a first group, the group carry-out predictions calculated for any possible group carry-in value, and, once the carry-out value for a first group is calculated, selecting the next group carry out value from the group carry-out predictions. The method also includes repeating the ripple selecting group carry-out values, until all group carry out values have been selected.

公开(公告)号：US10402165B2

公开(公告)日：2019-09-03

申请号：US15690301

申请日：2017-08-30

申请人： GSI Technology Inc.

发明人： Moshe Lazer

IPC分类号： G06F7/508 ,  G06F12/02

摘要： A system includes a non-destructive associative memory array and a predictor, a selector and a summer. The memory array includes a plurality of sections, each section includes cells arranged in rows and columns, to store bit j from a first multi-bit number and bit j from a second multi-bit number in a same column in section j. The predictor generally concurrently predicts a plurality of carry out values in each of the sections and the selector selects one of the predicted carry out values for all bits. The summer generally concurrently, for all bits, calculates a sum of the multi-bit numbers using the selected carry-out values.

公开(公告)号：US12106071B2

公开(公告)日：2024-10-01

申请号：US18150317

申请日：2023-01-05

申请人： GSI Technology Inc.

发明人： Eyal Amiel ,  Moshe Lazer ,  Samuel Lifsches

IPC分类号： G06F7/552

CPC分类号： G06F7/5525

摘要： A method for calculating a square root B having N bits of a number X having 2N bits includes iterating on bits bi of square root B starting from the most significant bit until the least significant bit of square root B. For each iteration, the method includes locating a 1 at the squared location of bit bi in a CHECK variable, determining the value of bit bi from the result of a comparison of number X with a function of all previously found bits and a previous comparison outcome, shifting all previously found bits right 1 location in a CHECK variable, and adding the determined value of bit bi into its squared location in the CHECK variable.