摘要:
An automated real time crew optimization engine for repairing crew problems including open flights, open pairings, and broken crews in airline operations, which generates multiple solutions in conformance with solution constraints by preprocessing the crew problems to generate potential solutions, and optimizing the potential solutions to provide optimized solutions. The preprocessing includes the use of self-connection methods, skipping-leg methods, and an extend-out-broken crew method. Potential solutions are generated by swap methods including a one-way swap method, a two-way swap method, and a three-way swap method. A depth-search-first algorithm and a shortest path algorithm are applied to the potential solutions to find optimal solutions.
摘要:
Open Pairings occurring during airline operations are repaired n at a time (where n is an integer) in near real time through use of two solution paths, one involving one-way fixes, and the other matching transformations. From the resulting multiple solutions, one is selected which is of least cost to the airline.
摘要:
A digital-to-analog converter (DAC) circuit includes a least significant bit (LSB) set of capacitors, each commonly coupled to an LSB node, and a most significant bit (MSB) set of capacitors, each coupled to an MSB node. A section-coupling capacitor couples the LSB and MSB nodes. The LSB node exhibits a parasitic capacitance, which tends to introduce a jump error voltage. Digital input signals are applied to the LSB and MSB capacitors, and in response, an analog output signal is developed on the MSB node. A compensation capacitor coupled to the MSB node has a compensation capacitance selected to offset the jump error voltage introduced by the parasitic capacitance. The compensation capacitor is enabled when all of the LSB capacitors are coupled to digital input signals having a logic ‘0’ state. Otherwise, the compensation capacitor is disabled (e.g., left in a floating state).
摘要:
A digital-to-analog converter (DAC) circuit includes a least significant bit (LSB) set of capacitors, each commonly coupled to an LSB node, and a most significant bit (MSB) set of capacitors, each coupled to an MSB node. A section-coupling capacitor couples the LSB and MSB nodes. The LSB node exhibits a parasitic capacitance, which tends to introduce a jump error voltage. Digital input signals are applied to the LSB and MSB capacitors, and in response, an analog output signal is developed on the MSB node. A compensation capacitor coupled to the MSB node has a compensation capacitance selected to offset the jump error voltage introduced by the parasitic capacitance. The compensation capacitor is enabled when all of the LSB capacitors are coupled to digital input signals having a logic ‘0’ state. Otherwise, the compensation capacitor is disabled (e.g., left in a floating state).