Nanometer scale fabrication method to produce thin film nanostructures
    1.
    发明授权
    Nanometer scale fabrication method to produce thin film nanostructures 失效
    制备薄膜纳米结构的纳米级制造方法

    公开(公告)号:US5922214A

    公开(公告)日:1999-07-13

    申请号:US785734

    申请日:1997-01-17

    申请人: Gang-yu Liu Song Xu

    发明人: Gang-yu Liu Song Xu

    摘要: A method for fabricating thin film nanostructures is provided. A layer of material on a substrate is mechanically displaced using an atomic force microscopy tip. The displacement is carried out in a fluid containing molecules which rapidly enter the void created by the AFM tip and bind to the clean substrate surface. These molecules are spatially confined in the void created by the displacement and form inlaid structures within the surrounding material. The surrounding material can be removed to create islands of the new material. The method is particularly adapted for use in fabricating nanometer-scale microelectronic devices.

    摘要翻译: 提供了制造薄膜纳米结构的方法。 使用原子力显微镜尖端在基底上的材料层进行机械位移。 位移是在含有快速进入由AFM尖端产生的空隙的分子的流体中进行的并且结合到干净的基底表面。 这些分子被空间限制在由位移产生的空隙中,并在周围的材料内形成镶嵌结构。 周围的材料可以被去除以产生新材料的岛屿。 该方法特别适用于制造纳米级微电子器件。

    Clock boosting systems and methods
    2.
    发明授权
    Clock boosting systems and methods 有权
    时钟提升系统和方法

    公开(公告)号:US07509598B1

    公开(公告)日:2009-03-24

    申请号:US11737702

    申请日:2007-04-19

    申请人: Yinan Shen Song Xu

    发明人: Yinan Shen Song Xu

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: Systems and methods are disclosed herein to provide software clock boosting techniques. For example in one embodiment, a method of configuring a programmable logic device includes receiving routed data; performing a software clock boost operation on the routed data to determine and include one or more desired clock delays for circuit elements. The software clock boost operation may include performing a static timing analysis on the routed data; determining a list of the desired clock delays; and modifying the routed data to insert the desired clock delays.

    摘要翻译: 本文公开了提供软件时钟提升技术的系统和方法。 例如在一个实施例中,配置可编程逻辑设备的方法包括接收路由数据; 对路由数据执行软件时钟提升操作以确定并包括用于电路元件的一个或多个期望的时钟延迟。 软件时钟提升操作可以包括对路由数据执行静态时序分析; 确定期望的时钟延迟的列表; 并修改路由数据以插入所需的时钟延迟。

    Elastic Rope
    3.
    发明申请
    Elastic Rope 审中-公开
    弹力绳

    公开(公告)号:US20140113095A1

    公开(公告)日:2014-04-24

    申请号:US14126281

    申请日:2011-08-01

    申请人: Song Xu

    发明人: Song Xu

    IPC分类号: A44C5/00 A45D8/36

    摘要: The utility model relates to the technical field of wires, in particular to an elastic rope. The elastic rope comprises an elastic body, and a flocked layer is attached to the outer surface of the body; and the body can be a naked elastic rubber rope or silica gel rope, also can be a complex formed by compounding chemical fiber threads or woven belts on the periphery of the naked elastic rubber rope or silica gel rope, and also can be a spring wire, a curved wire, a curl cord, or a telephone line and the like. The flocked layer is attached to the outer surface of the body; the color of the flocked layer can be randomly selected so as to obtain excellent decorativeness; the flocked layer can be tightly attached to the body by utilizing a flocking process, the flocked layer is difficult to separate from the body and fall off, so that usability and decorativeness are greatly promoted; and when the elastic rope is used for binding hair, the flocked layer cannot be wound and twisted with hair to form knots, so that the elastic rope is very convenient and smooth to disassemble and hair cannot be damaged. The elastic rope has a simple structure, is scientific and reasonable, is easy to make and is low in investment cost; and the flocked layer also has a protection effect, so that aging and friction damage of the body are retarded and service life is prolonged.

    摘要翻译: 本实用新型涉及电线技术领域,特别涉及弹性绳。 弹性绳包括弹性体,植绒层附着到身体的外表面上; 并且身体可以是裸弹性橡胶绳或硅胶绳,也可以是通过在裸弹性橡胶绳或硅胶绳的周边上配合化学纤维线或编织带而形成的复合物,并且还可以是弹簧丝 ,弯曲线,卷曲线或电话线等。 植绒层附着在身体的外表面上; 可以随机选择植绒层的颜色,以获得优异的装饰性; 植绒层可以通过植绒过程紧密地附着到身体上,植绒层难以与身体分离并脱落,从而大大促进了使用性和装饰性; 当弹力绳用于绑定头发时,植绒层不能被头发缠绕和扭曲以形成结,使得弹性绳非常方便和平滑地分解并且头发不会被损坏。 弹性绳结构简单,科学合理,易于制作,投资成本低; 并且植绒层也具有保护作用,从而延缓身体的老化和摩擦损伤,延长使用寿命。

    Commodity Anti-counterfeiting Tracing Method and System Applicable to E-Commerce Platform

    公开(公告)号:US20210217068A1

    公开(公告)日:2021-07-15

    申请号:US17218097

    申请日:2021-03-30

    申请人: Song Xu

    发明人: Song Xu

    IPC分类号: G06Q30/06 G06Q20/40

    摘要: The disclosure relates to a commodity anti-counterfeiting tracing method and system applicable to an e-commerce platform. The disclosure includes a commodity identification feature code set on a commodity package, a scan-to-shelve verification segment set in a commodity information publishing flow, and a scan-to-transact verification segment set in a transaction flow. Therefore, scanning to shelve and scanning to sell may be implemented. This may be ensured that a commodity bought by a buyer from the e-commerce platform is certified, and the goodwill of the e-commerce platform may also be improved greatly. Moreover, complete compatibility with an existing standard article numbering system may be achieved, the counterfeit commodities may be prevented effectively from entering each circulation segment of a supply chain, the probability that the counterfeit commodities enter the e-commerce platform for circulation may further be reduced, and the purpose of anti-counterfeiting tracing may be achieved.

    Clock boosting systems and methods
    9.
    发明授权
    Clock boosting systems and methods 有权
    时钟提升系统和方法

    公开(公告)号:US08086986B1

    公开(公告)日:2011-12-27

    申请号:US12408047

    申请日:2009-03-20

    申请人: Yinan Shen Song Xu

    发明人: Yinan Shen Song Xu

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: In one embodiment of the invention, a programmable logic device (PLD) includes logic blocks, registers corresponding to the logic blocks, and configuration memory adapted to store configuration data for configuring the PLD. Also included in the PLD is a general routing network having a plurality of routing wires and a clock distribution network having a plurality of routing wires. At least one clock signal path is provided within the PLD from a clock source to one of the registers via a routing wire of the clock distribution network and a routing wire of the general routing network.

    摘要翻译: 在本发明的一个实施例中,可编程逻辑器件(PLD)包括逻辑块,对应于逻辑块的寄存器,以及适于存储用于配置PLD的配置数据的配置存储器。 还包括在PLD中的是具有多个路由线的通用路由网络和具有多个路由选线的时钟分配网络。 至少一个时钟信号路径通过时钟分配网络的路由选线和一般路由网络的路由选线从时钟源提供给寄存器之一。