摘要:
A system is disclosed for selectively serially coupling a plurality of stations in a communications network into a single communications path. In the system of the invention, a plurality of tap boxes are serially coupled into the single communications path. Each station is coupled to a desired associated one of the tap boxes by way of an associated tap cable. When the tap cable is connected to a first portion of the tap box, a first impedance corresponding to the characteristic impedance of the single communications path is serially coupled into the single communications path to enable the station associated with the tap cable to be coupled to the single communications path by way of the first impedance. When the tap cable is connected to a second portion of the tap box, the first impedance is effectively removed from the single communications path and a test impedance is coupled to the tap cable to enable the station associated with the tap cable to test itself. In a first embodiment, the first and second portions of the tap box are respectively the tip and ring contacts of a stereo jack. In a second embodiment, the first and second portions of the tap box are separate audio jacks. In each embodiment, a connection means, such as a monaural plug, is connected to the end of each tap cable and is used to selectively couple the tap cable to either of the first and second portions of a desired tap box.
摘要:
A data processing system in which a host processor is connected to a plurality of remote processing devices over a common communication channel in which a number of the remote processors are commonly connected to a transceiver for transmitting and receiving data over the communication channel. Switching members on each of the remote processing devices select a pair of communication lines coupled to a priority resolving circuit for transmitting request to send signals and receiving clear to send signals, thereby enabling the remote processing devices to transmit and receive data over the communication channel.
摘要:
A method and apparatus for transferring data between two data processors includes transferring a data byte from the first processor to a latch member, setting a flip-flop circuit which generates an interrupt signal to the second processor enabling the second processor to transfer the data byte from the latch member to a RAM memory unit associated with the second processor. The second processor resets the flip-flop circuit which outputs a signal to the first processor enabling the first processor to transfer another data byte to the latch member. Steering address bits associated with each of the processors are used to provide control signals to select the storage member in which the data bytes are to be transferred. A second flip-flop circuit associated with the second processor allows the second processor to transfer data to the first processor in the same manner.