公开(公告)号：US5831753A

公开(公告)日：1998-11-03

申请号：US696477

申请日：1996-08-14

申请人： Gerhard Hochstuhl ,  Philippe Maibach

发明人： Gerhard Hochstuhl ,  Philippe Maibach

IPC分类号： G01M17/007 ,  G01M11/00 ,  G02B6/00 ,  H04B10/00

CPC分类号： H04B10/07

摘要： An optical fiber transmission system is specified which can be checked in a simple way for satisfactory power reserve. For this purpose, a transmission current ID is modulated with a frequency fT by switching over the current between a normal value IDN and a smaller test value IDT, which is not equal to zero.

摘要翻译： 规定光纤传输系统，可以以简单的方式检查满意的功率储备。 为此，通过切换正常值IDN和不等于零的较小测试值IDT之间的电流，以频率fT调制发送电流ID。

公开(公告)号：US07508640B2

公开(公告)日：2009-03-24

申请号：US11640228

申请日：2006-12-18

申请人： Gerold Knapp ,  Gerhard Hochstuhl ,  Rudolf Wieser ,  Luc Meysenc

发明人： Gerold Knapp ,  Gerhard Hochstuhl ,  Rudolf Wieser ,  Luc Meysenc

IPC分类号： H02H3/08

CPC分类号： H02H7/1225 ,  H02M1/32 ,  H02M7/487

摘要： The document specifies a method for fault handling in a converter circuit for switching three voltage levels, in which the converter circuit has a converter subsystem provided for each phase (R,S,T), in which a top fault current path (A) or a bottom fault current path (B) in the converter subsystem is detected, the top fault current path (A) running through the first, second, third and sixth power semiconductor switches in the converter subsystem or through the first and fifth power semiconductor switches (S1, S5) in the converter subsystem, and the bottom fault current path (B) running through the second, third, fourth and fifth power semiconductor switches in the converter subsystem or through the fourth and sixth power semiconductor switches in the converter subsystem, and in which the power semiconductor switches are switched on the basis of a fault switching sequence. To avoid phase shorting of all the phases of the converter circuit in order to achieve a safe operating state for the converter circuit in the event of a fault, the fault switching sequence in the event of detection of the top or the bottom fault current path (A, B) is initially followed by the detection's accompanying switching status of each power semiconductor switch being recorded. In addition, in the event of detection of the top fault current path (A) the first power semiconductor switch and then the third power semiconductor are turned off, and in the event of detection of the bottom fault current path (B) the fourth power semiconductor switch and then the second power semiconductor are turned off.

摘要翻译： 该文件规定了用于切换三个电压电平的转换器电路中的故障处理方法，其中转换器电路具有为每个相位（R，S，T）提供的转换器子系统，其中顶部故障电流路径（A）或 检测转换器子系统中的底部故障电流路径（B），在转换器子系统中通过第一，第二，第三和第六功率半导体开关的顶部故障电流路径（A），或通过第一和第五功率半导体开关 S1，S5）和通过转换器子系统中的第二，第三，第四和第五功率半导体开关的底部故障电流路径（B），或通过转换器子系统中的第四和第六功率半导体开关，以及 其中功率半导体开关基于故障切换序列被切换。 为了避免转换器电路的所有相的相位短路，以便在发生故障时实现转换器电路的安全工作状态，在检测到顶部或底部故障电流路径的情况下，故障切换顺序（ A，B）最初跟随着被记录的每个功率半导体开关的检测伴随的开关状态。 此外，在检测到顶部故障电流路径（A）的情况下，第一功率半导体开关然后关闭第三功率半导体，并且在检测到底部故障电流路径（B）的情况下，第四功率 半导体开关，然后关闭第二功率半导体。

公开(公告)号：US20080204959A1

公开(公告)日：2008-08-28

申请号：US11640228

申请日：2006-12-18

申请人： Gerold Knapp ,  Gerhard Hochstuhl ,  Rudolf Wieser ,  Luc Meysenc

发明人： Gerold Knapp ,  Gerhard Hochstuhl ,  Rudolf Wieser ,  Luc Meysenc

IPC分类号： H02H9/02 ,  H02H3/08

CPC分类号： H02H7/1225 ,  H02M1/32 ,  H02M7/487

摘要： The document specifies a method for fault handling in a converter circuit for switching three voltage levels, in which the converter circuit has a converter subsystem provided for each phase (R,S,T), in which a top fault current path (A) or a bottom fault current path (B) in the converter subsystem is detected, the top fault current path (A) running through the first, second, third and sixth power semiconductor switches in the converter subsystem or through the first and fifth power semiconductor switches (S1, S5) in the converter subsystem, and the bottom fault current path (B) running through the second, third, fourth and fifth power semiconductor switches in the converter subsystem or through the fourth and sixth power semiconductor switches in the converter subsystem, and in which the power semiconductor switches are switched on the basis of a fault switching sequence. To avoid phase shorting of all the phases of the converter circuit in order to achieve a safe operating state for the converter circuit in the event of a fault, the fault switching sequence in the event of detection of the top or the bottom fault current path (A, B) is initially followed by the detection's accompanying switching status of each power semiconductor switch being recorded. In addition, in the event of detection of the top fault current path (A) the first power semiconductor switch and then the third power semiconductor are turned off, and in the event of detection of the bottom fault current path (B) the fourth power semiconductor switch and then the second power semiconductor are turned off.

摘要翻译： 该文件规定了用于切换三个电压电平的转换器电路中的故障处理方法，其中转换器电路具有为每个相位（R，S，T）提供的转换器子系统，其中顶部故障电流路径（A）或 检测转换器子系统中的底部故障电流路径（B），在转换器子系统中通过第一，第二，第三和第六功率半导体开关的顶部故障电流路径（A），或通过第一和第五功率半导体开关 转换器子系统中的S 1，S 5）以及通过转换器子系统中的第二，第三，第四和第五功率半导体开关的底部故障电流路径（B），或通过转换器子系统中的第四和第六功率半导体开关 ，并且其中基于故障切换序列来切换功率半导体开关。 为了避免转换器电路的所有相的相位短路，以便在发生故障时实现转换器电路的安全工作状态，在检测到顶部或底部故障电流路径的情况下，故障切换顺序（ A，B）最初跟随着被记录的每个功率半导体开关的检测伴随的开关状态。 此外，在检测到顶部故障电流路径（A）的情况下，第一功率半导体开关然后关闭第三功率半导体，并且在检测到底部故障电流路径（B）的情况下，第四功率 半导体开关，然后关闭第二功率半导体。

公开(公告)号：US5473260A

公开(公告)日：1995-12-05

申请号：US280797

申请日：1994-07-26

申请人： Christian Hauswirth ,  Gerhard Hochstuhl ,  Bruno Hofstetter ,  Markus Keller

发明人： Christian Hauswirth ,  Gerhard Hochstuhl ,  Bruno Hofstetter ,  Markus Keller

IPC分类号： G01R31/26 ,  G01K7/01 ,  H01L21/66 ,  H01L29/74 ,  H01L29/744

CPC分类号： G01K7/01

摘要： A method and a circuit arrangement having a device for measuring the depletion layer temperature of a GTO are specified. In this case, a measurement current (I.sub.M) is impressed in the gate circuit, and the voltage (U.sub.GR) between the cathode and gate is measured, with an applied measurement current (I.sub.M), after the transient turn-off processes have decayed. This voltage (U.sub.GR) is at this time dependent on the depletion layer temperature of the GTO. It thus becomes possible to measure the depletion layer temperature directly on the element, that is to say without circuitous routes via a heat sink temperature and calculation of the thermal resistance or the like, and during operation, continuously, and in consequence to monitor and control the stress level on the GTO precisely.

摘要翻译： 指定了具有用于测量GTO的耗尽层温度的装置的方法和电路装置。 在这种情况下，在栅极电路中施加测量电流（IM），并且在瞬态关断过程衰减之后，利用施加的测量电流（IM）来测量阴极和栅极之间的电压（UGR）。 此时该电压（UGR）依赖于GTO的耗尽层温度。 因此，可以直接在元件上测量耗尽层温度，也就是说，通过散热器温度和热阻等的计算，以及在运行期间，连续地以及因此进行监测和控制 精神上的GTO的压力水平。