HARDWARE-ASSISTED PROGRAM TRACE COLLECTION WITH SELECTABLE CALL-SIGNATURE CAPTURE
    1.
    发明申请
    HARDWARE-ASSISTED PROGRAM TRACE COLLECTION WITH SELECTABLE CALL-SIGNATURE CAPTURE 审中-公开
    硬件辅助程序跟踪采集与可选择的呼叫签名捕获

    公开(公告)号:US20130055033A1

    公开(公告)日:2013-02-28

    申请号:US13300863

    申请日:2011-11-21

    IPC分类号: G06F11/34

    摘要: Hardware-assisted program tracing is facilitated by a processor that includes a root instruction address register, a program trace signature computation unit and a call signature register. When a program instruction having an address matching the root instruction address register is executed, a program trace signature is captured in the call signature register and capture of branch history is commenced. By accumulating different values of the call signature register, for example in response to an interrupt generated when the root instruction is executed, software that performs program tracing can obtain signatures of all of the multiple execution paths that lead to the root instruction, which is also specified by software in order to set different root instructions for program tracing. In an alternative implementation, a storage for multiple call signatures is provided in the processor and read at once by the software.

    摘要翻译: 硬件辅助程序跟踪由包括根指令地址寄存器,程序跟踪签名计算单元和呼叫签名寄存器的处理器来促进。 当执行具有与根指令地址寄存器匹配的地址的程序指令时,在呼叫签名寄存器中捕获程序跟踪签名,并且开始分支历史记录的捕获。 通过累积呼叫签名寄存器的不同值,例如响应于执行根指令时产生的中断,执行程序跟踪的软件可以获得导致根指令的所有多个执行路径的签名,这也是 由软件指定,以便为程序跟踪设置不同的根指令。 在替代实现中,在处理器中提供用于多个呼叫签名的存储器,并由软件一次读取。

    BRANCH TRACE HISTORY COMPRESSION
    2.
    发明申请
    BRANCH TRACE HISTORY COMPRESSION 失效
    分行追踪历史压缩

    公开(公告)号:US20120005463A1

    公开(公告)日:2012-01-05

    申请号:US12827916

    申请日:2010-06-30

    IPC分类号: G06F9/38

    CPC分类号: G06F11/3476 G06F2201/88

    摘要: The disclosure provides a method, data processing system, and computer program product for managing a branch trace environment. In response to a branch being taken for a first branch instruction that is conditional and direct in the branch instructions, a performance monitoring unit stores an effective address of the first branch instruction into a first entry in a set of entries in a memory. The performance monitoring unit counts each branch not taken in processing the branch instructions occurring after the first branch instruction to form a branch count. In response to a branch being taken during processing of subsequent branch instructions in the branch instructions after the first branch instruction, the performance monitoring unit determines whether to create a second entry in the set of entries in the memory using the branch count with a set of rules identifying when the second entry is to be made.

    摘要翻译: 本公开提供了一种用于管理分支跟踪环境的方法,数据处理系统和计算机程序产品。 响应于在分支指令中为有条件且直接的第一分支指令而分支,性能监视单元将第一分支指令的有效地址存储在存储器中的一组条目中的第一条目中。 性能监视单元计算在处理在第一分支指令之后发生的分支指令时不采取的每个分支以形成分支计数。 响应于在第一分支指令之后在分支指令中处理后续分支指令期间所采取的分支,性能监视单元使用具有一组分支计数的分支计数来确定是否在存储器中的条目集合中创建第二条目 识别何时进行第二个条目的规则。

    Tracking a programs calling context using a hybrid code signature
    3.
    发明授权
    Tracking a programs calling context using a hybrid code signature 有权
    使用混合代码签名跟踪程序调用上下文

    公开(公告)号:US08756582B2

    公开(公告)日:2014-06-17

    申请号:US13214352

    申请日:2011-08-22

    IPC分类号: G06F9/44 G06F9/45

    摘要: A method for a hybrid code signature including executing, via a processor, an application, the executing comprising executing a root instruction of the application; profiling, via the processor, the executing of the application, the profiling comprising storing a reference signature; determining, via the processor, a working signature of instructions executed subsequent to the executing of the root instruction, the determining comprising implementing a hashing function of the instructions in response to storing the reference signature; tracking the updating of the working signature by storing a value in a counter; and updating continuously, via the processor, the working signature with the hashing function while at least the working signature does not match the reference signature.

    摘要翻译: 一种用于混合代码签名的方法,包括经由处理器执行应用程序,所述执行包括执行所述应用程序的根指令; 通过所述处理器对所述应用的执行进行分析,所述分析包括存储参考签名; 经由所述处理器确定在所述根指令执行之后执行的指令的工作签名,所述确定包括响应于存储所述参考签名来实现所述指令的哈希函数; 通过将值存储在计数器中来跟踪工作签名的更新; 并且通过处理器连续地更新具有散列函数的工作签名,同时至少工作签名与参考签名不匹配。

    Data placement optimization using data context collected during garbage collection
    4.
    发明授权
    Data placement optimization using data context collected during garbage collection 有权
    使用垃圾收集期间收集的数据环境进行数据放置优化

    公开(公告)号:US08621150B2

    公开(公告)日:2013-12-31

    申请号:US12757173

    申请日:2010-04-09

    IPC分类号: G06F12/00 G06F13/00 G06F13/28

    摘要: Mechanisms are provided for data placement optimization during runtime of a computer program. The mechanisms detect cache misses in a cache of the data processing system and collect cache miss information for objects of the computer program. Data context information is generated for an object in an object access sequence of the computer program. The data context information identifies one or more additional objects accessed as part of the object access sequence in association with the object. The cache miss information is correlated with the data context information of the object. Data placement optimization is performed on the object, in the object access sequence, with which the cache miss information is associated. The data placement optimization places connected objects in the object access sequence in close proximity to each other in a memory structure of the data processing system.

    摘要翻译: 提供了在计算机程序运行期间进行数据放置优化的机制。 这些机制检测数据处理系统的缓存中的高速缓存未命中,并收集计算机程序对象的高速缓存未命中信息。 为计算机程序的对象访问序列中的对象生成数据上下文信息。 数据上下文信息识别作为与对象相关联的对象访问序列的一部分访问的一个或多个附加对象。 高速缓存未命中信息与对象的数据上下文信息相关联。 在对象访问序列中对对象进行数据放置优化,与缓存未命中信息相关联。 数据放置优化将连接的对象放置在数据处理系统的存储器结构中彼此靠近的对象访问序列中。

    TRACKING A PROGRAMS CALLING CONTEXT USING A HYBRID CODE SIGNATURE
    5.
    发明申请
    TRACKING A PROGRAMS CALLING CONTEXT USING A HYBRID CODE SIGNATURE 有权
    使用混合代码签名跟踪程序的呼叫语境

    公开(公告)号:US20130054942A1

    公开(公告)日:2013-02-28

    申请号:US13214352

    申请日:2011-08-22

    IPC分类号: G06F9/38 G06F9/30

    摘要: A method for a hybrid code signature including executing, via a processor, an application, the executing comprising executing a root instruction of the application; profiling, via the processor, the executing of the application, the profiling comprising storing a reference signature; determining, via the processor, a working signature of instructions executed subsequent to the executing of the root instruction, the determining comprising implementing a hashing function of the instructions in response to storing the reference signature; tracking the updating of the working signature by storing a value in a counter; and updating continuously, via the processor, the working signature with the hashing function while at least the working signature does not match the reference signature.

    摘要翻译: 一种用于混合代码签名的方法,包括经由处理器执行应用程序,所述执行包括执行所述应用程序的根指令; 通过所述处理器对所述应用的执行进行分析,所述分析包括存储参考签名; 经由所述处理器确定在所述根指令执行之后执行的指令的工作签名,所述确定包括响应于存储所述参考签名来实现所述指令的哈希函数; 通过将值存储在计数器中来跟踪工作签名的更新; 并且通过处理器连续地更新具有散列函数的工作签名,同时至少工作签名与参考签名不匹配。

    Method for compiling program components in a mixed static and dynamic environment
    6.
    发明授权
    Method for compiling program components in a mixed static and dynamic environment 失效
    在混合静态和动态环境中编译程序组件的方法

    公开(公告)号:US06973646B1

    公开(公告)日:2005-12-06

    申请号:US09621571

    申请日:2000-07-21

    IPC分类号: G06F9/45

    CPC分类号: G06F9/45516

    摘要: This invention describes a method and several variants for compiling programs or components of programs in a mixed static and dynamic environment, so as to reduce the amount of time and memory spent in run-time compilation, or to exercise greater control over testing of the executable code for the program, or both. The invention involves generating persistent code images prior to program execution based on static compilation or dynamic compilation from a previous run, and then, adapting those images during program execution. We describe a method for generating auxiliary information in addition to the executable code that is recorded in the persistent code image. Further, we describe a method for checking the validity of those code images, adapting those images to the new execution context, and generating new executable code to respond to dynamic events, during program execution. Our method allows global interprocedural optimizations to be performed on the program, even if the programming language supports, or requires, dynamic binding. Variants of the method show how one or several of the features of the method may be performed. The invention is particularly useful in the context of implementing Java Virtual Machines, although it can also be used in implementing other programming languages.

    摘要翻译: 本发明描述了用于在混合静态和动态环境中编译程序或程序组件的方法和几个变体,以便减少在运行时编译中花费的时间和内存的量,或者更好地控制可执行程序的测试 程序的代码,或两者。 本发明涉及在基于来自先前运行的静态编译或动态编译之前,在程序执行之前生成持久代码图像,然后在程序执行期间对这些图像进行调整。 我们描述除了记录在持久代码图像中的可执行代码之外,还生成辅助信息的方法。 此外,我们描述了在程序执行期间检查这些代码图像的有效性,使这些图像适应新的执行上下文以及生成新的可执行代码以响应动态事件的方法。 我们的方法允许对程序执行全局过程间优化,即使编程语言支持或需要动态绑定。 该方法的变体显示了如何执行该方法的一个或多个特征。 本发明在实现Java虚拟机的上下文中是特别有用的,尽管它也可以用于实现其他编程语言。

    MECHANISM FOR DATA CACHE REPLACEMENT BASED ON REGION POLICIES
    7.
    发明申请
    MECHANISM FOR DATA CACHE REPLACEMENT BASED ON REGION POLICIES 有权
    基于区域政策的数据缓存替代机制

    公开(公告)号:US20090113135A1

    公开(公告)日:2009-04-30

    申请号:US11929771

    申请日:2007-10-30

    IPC分类号: G06F12/08

    CPC分类号: G06F12/126

    摘要: A system and method for cache replacement includes: augmenting each cache block in a cache region with a region hint indicating a temporal priority of the cache block; receiving an indication that a cache miss has occurred; and selecting for eviction the cache block comprising the region hint indicating a low temporal priority.

    摘要翻译: 一种用于高速缓存替换的系统和方法包括:利用指示高速缓存块的时间优先级的区域提示来增强高速缓存区中的每个高速缓存块; 接收发生高速缓存未命中的指示; 以及选择驱逐包含指示低时间优先级的区域提示的高速缓存块。

    TARGET BRANCH PREDICTION USING CORRELATION OF LOCAL TARGET HISTORIES
    8.
    发明申请
    TARGET BRANCH PREDICTION USING CORRELATION OF LOCAL TARGET HISTORIES 失效
    使用本地目标历史相关的目标分支预测

    公开(公告)号:US20090037708A1

    公开(公告)日:2009-02-05

    申请号:US12246282

    申请日:2008-10-06

    IPC分类号: G06F9/38

    摘要: A system for predicting multiple targets for a single branch includes: a branch target buffer that includes a previous next address for an instruction and that receives an indirect instruction address to provide a first branch target prediction; a first branch table for capturing local past target information of an indirect branch in an encoded form; a second branch table which is a correlation table for storing potential branch targets based on a local branch history and which provides a second branch target prediction when the first branch target prediction is not successful; an exclusion predictor for inhibiting updates of inefficient entries; and a multiplexer to select the predicted target as output.

    摘要翻译: 用于预测单个分支的多个目标的系统包括:分支目标缓冲器,其包括用于指令的先前的下一个地址并且接收间接指令地址以提供第一分支目标预测; 用于以编码形式捕获间接分支的当地过去目标信息的第一分支表; 第二分支表,其是基于本地分支历史存储潜在分支目标的相关表,并且当第一分支目标预测不成功时提供第二分支目标预测; 用于禁止更低效率条目的排除预测器; 以及选择预测目标作为输出的多路复用器。

    Method for optimizing locks in computer programs
    9.
    发明授权
    Method for optimizing locks in computer programs 失效
    用于优化计算机程序中的锁的方法

    公开(公告)号:US06530079B1

    公开(公告)日:2003-03-04

    申请号:US09323989

    申请日:1999-06-02

    IPC分类号: G06F9445

    CPC分类号: G06F9/52 G06F8/443

    摘要: A method and several variants for using information about the scope of access of objects acted upon by mutual exclusion, or mutex, locks to transform a computer program by eliminating locking operations from the program or simplifying the locking operations, while strictly performing the semantics of the original program. In particular, if it can be determined by a compiler that the object locked can only be accessed by a single thread it is not necessary to perform the “acquire” or “release” part of the locking operation, and only its side effects must be performed. Likewise, if it can be determined that the side effects of a locking operation acting on a variable which is locked in multiple threads are not needed, then only the locking operation, and not the side effects, needs to be performed. This simplifies the locking operation, and leads to faster programs which use fewer computer processor resources to execute; and programs which perform fewer shared memory accesses, which in turn not only causes the optimized program, but also other programs executing on the same computing machine to execute faster. The method also describes how information about the semantics of the locking operation side effects and the information about the scope of access can also be used to eliminate performing the side effect parts of the locking operation, thereby completely eliminating the locking operation. The method also describes how to analyze the program to compute the necessary information about the scope of access. Variants of the method show how one or several of the features of the method may be performed.

    摘要翻译: 一种方法和几种变体,用于使用通过互斥或互斥锁进行访问的对象的范围的信息,以通过从程序中消除锁定操作或简化锁定操作来转换计算机程序,同时严格执行 原始程序。 特别是,如果可以由编译器确定锁定的对象只能由单个线程访问,则不需要执行锁定操作的“获取”或“释放”部分,只有其副作用必须是 执行。 同样,如果可以确定不需要对锁定在多个线程中的变量作用的锁定操作的副作用,则仅需要执行锁定操作而不是副作用。 这简化了锁定操作,并导致更快的程序使用更少的计算机处理器资源来执行; 以及执行较少的共享存储器访问的程序,这又不仅导致优化的程序,而且还导致在同一计算机上执行的其他程序执行得更快。 该方法还描述了关于锁定操作侧的语义的信息如何影响以及关于访问范围的信息也可以用于消除执行锁定操作的副作用部分,从而完全消除锁定操作。 该方法还描述了如何分析程序来计算有关访问范围的必要信息。 该方法的变体显示了如何执行该方法的一个或多个特征。

    Adaptive next-executing-cycle trace selection for trace-driven code optimizers
    10.
    发明授权
    Adaptive next-executing-cycle trace selection for trace-driven code optimizers 有权
    跟踪驱动代码优化器的自适应下一个执行周期跟踪选择

    公开(公告)号:US08756581B2

    公开(公告)日:2014-06-17

    申请号:US13020222

    申请日:2011-02-03

    IPC分类号: G06F9/44 G06F9/45 G06F11/00

    CPC分类号: G06F8/443 G06F9/4552

    摘要: An apparatus includes a processor for executing instructions at runtime and instructions for dynamically compiling the set of instructions executing at runtime. A memory device stores the instructions to be executed and the dynamic compiling instructions. A memory device serves as a trace buffer used to store traces during formation during the dynamic compiling. The dynamic compiling instructions includes a next-executing-cycle (N-E-C) trace selection process for forming traces for the instructions executing at runtime. The N-E-C trace selection process continues through an existing trace-head when forming traces without terminating a recording of a current trace if an existing trace-head is encountered.

    摘要翻译: 一种装置包括用于在运行时执行指令的处理器以及用于动态地编译在运行时执行的一组指令的指令。 存储器件存储要执行的指令和动态编译指令。 存储器件用作在动态编译期间在形成期间存储迹线的跟踪缓冲器。 动态编译指令包括下一个执行周期(N-E-C)跟踪选择过程,用于为运行时执行的指令形成轨迹。 如果遇到现有的跟踪头,N-E-C跟踪选择过程将在形成轨迹时继续通过现有跟踪头,而不终止当前轨迹的记录。