SEMICONDUCTOR DEVICE COMPRISING METAL-BASED eFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING METAL AGGLOMERATION AND/OR VOIDING
    1.
    发明申请
    SEMICONDUCTOR DEVICE COMPRISING METAL-BASED eFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING METAL AGGLOMERATION AND/OR VOIDING 有权
    通过增强金属组合和/或消声来增强金属化程度的提高编程效率的半导体器件

    公开(公告)号:US20130307114A1

    公开(公告)日:2013-11-21

    申请号:US13952792

    申请日:2013-07-29

    Abstract: Metal fuses in semiconductor devices may be formed on the basis of additional mechanisms for obtaining superior electromigration in the fuse bodies. To this end, the compressive stress caused by the current-induced metal diffusion may be restricted or reduced in the fuse body, for instance, by providing a stress buffer region and/or by providing a dedicated metal agglomeration region. The concept may be applied to the metallization system and may also be used in the device level, when fabricating the metal fuse in combination with high-k metal gate electrode structures.

    Abstract translation: 可以基于用于在保险丝体中获得优异的电迁移的附加机构来形成半导体器件中的金属熔丝。 为此,例如通过提供应力缓冲区域和/或通过提供专用的金属附聚区域,可以限制或减小由电流引起的金属扩散引起的压缩应力。 该概念可以应用于金属化系统,并且当与高k金属栅电极结构组合制造金属熔丝时也可以在器件级中使用。

    BEOL anti-fuse structures for gate last semiconductor devices
    2.
    发明授权
    BEOL anti-fuse structures for gate last semiconductor devices 有权
    用于门最后半导体器件的BEOL反熔丝结构

    公开(公告)号:US08785300B2

    公开(公告)日:2014-07-22

    申请号:US13942800

    申请日:2013-07-16

    Abstract: An approach is provided for semiconductor devices including an anti-fuse structure. The semiconductor device includes a first metallization layer including a first portion of a first electrode and a second electrode, the second electrode being formed in a substantially axial plane surrounding the first portion of the first electrode, with a dielectric material in between the two electrodes. An ILD is formed over the first metallization layer, a second metallization layer including a second portion of the first electrode is formed over the ILD, and at least one via is formed through the ILD, electrically connecting the first and second portions of the first electrode. Breakdown of the dielectric material is configured to enable an operating current to flow between the second electrode and the first electrode in a programmed state of the anti-fuse structure.

    Abstract translation: 为包括反熔丝结构的半导体器件提供了一种方法。 半导体器件包括第一金属化层,其包括第一电极和第二电极的第一部分,第二电极形成在围绕第一电极的第一部分的大致轴向平面中,在两个电极之间具有介电材料。 在第一金属化层上形成ILD,在ILD上形成包括第一电极的第二部分的第二金属化层,并且通过ILD形成至少一个通孔,电连接第一电极的第一和第二部分 。 介电材料的击穿被配置为使得工作电流能够在反熔丝结构的编程状态下在第二电极和第一电极之间流动。

    Semiconductor device comprising metal-based eFuses of enhanced programming efficiency by enhancing metal agglomeration and/or voiding
    3.
    发明授权
    Semiconductor device comprising metal-based eFuses of enhanced programming efficiency by enhancing metal agglomeration and/or voiding 有权
    半导体器件包括通过增强金属聚集和/或排空而提高编程效率的基于金属的eFuse

    公开(公告)号:US08653624B2

    公开(公告)日:2014-02-18

    申请号:US13952792

    申请日:2013-07-29

    Abstract: Metal fuses in semiconductor devices may be formed on the basis of additional mechanisms for obtaining superior electromigration in the fuse bodies. To this end, the compressive stress caused by the current-induced metal diffusion may be restricted or reduced in the fuse body, for instance, by providing a stress buffer region and/or by providing a dedicated metal agglomeration region. The concept may be applied to the metallization system and may also be used in the device level, when fabricating the metal fuse in combination with high-k metal gate electrode structures.

    Abstract translation: 可以基于用于在保险丝体中获得优异的电迁移的附加机构来形成半导体器件中的金属熔丝。 为此,例如通过提供应力缓冲区域和/或通过提供专用的金属附聚区域,可以限制或减小由电流引起的金属扩散引起的压缩应力。 该概念可以应用于金属化系统,并且当与高k金属栅电极结构组合制造金属熔丝时也可以在器件级中使用。

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