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公开(公告)号:US20230228940A1
公开(公告)日:2023-07-20
申请号:US17577162
申请日:2022-01-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ian Melville , Nicholas Polomoff , Thomas Houghton , Koushik Ramachandran , Pallabi Das
CPC classification number: G02B6/1228 , G02B6/13 , G02B2006/12061
Abstract: Structures for a cavity included in a photonics chip and methods of fabricating a structure for a cavity included in a photonics chip. The structure includes a substrate, a back-end-of-line stack having interlayer dielectric layers on the substrate, and a cavity penetrating through the back-end-of-line stack and into the substrate. The cavity includes first sidewalls and second sidewalls, and the second sidewalls have an alternating arrangement with the first sidewalls to define non-right-angle corners.
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公开(公告)号:US20240393523A1
公开(公告)日:2024-11-28
申请号:US18202337
申请日:2023-05-26
Applicant: GlobalFoundries U.S. Inc.
Inventor: Brittany Hedrick , Ian Melville , Michael David Webster , Harry Cox , Jorge Lubguban , Sarah Knickerbocker
Abstract: Structures for a photonics chip that include a cavity or groove and methods of forming same. The structure comprises a semiconductor substrate including a first opening, a back-end-of-line stack on the semiconductor substrate, and a dielectric layer on the back-end-of-line stack. The back-end-of-line stack includes a pad, and the dielectric layer includes a second opening that extends to the pad. The structure further comprises an electrical interconnect inside the second opening in the dielectric layer. The electrical interconnect includes a sidewall that is separated in a lateral direction from the dielectric layer by a gap.
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公开(公告)号:US11828983B2
公开(公告)日:2023-11-28
申请号:US17577162
申请日:2022-01-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ian Melville , Nicholas Polomoff , Thomas Houghton , Koushik Ramachandran , Pallabi Das
CPC classification number: G02B6/1228 , G02B6/13 , G02B2006/12061
Abstract: Structures for a cavity included in a photonics chip and methods of fabricating a structure for a cavity included in a photonics chip. The structure includes a substrate, a back-end-of-line stack having interlayer dielectric layers on the substrate, and a cavity penetrating through the back-end-of-line stack and into the substrate. The cavity includes first sidewalls and second sidewalls, and the second sidewalls have an alternating arrangement with the first sidewalls to define non-right-angle corners.
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