公开(公告)号：US20240371809A1

公开(公告)日：2024-11-07

申请号：US18311712

申请日：2023-05-03

Applicant: GlobalFoundries U.S. Inc.

Inventor： Haritez Narisetty ,  Manubhai Patel Jignesh ,  Ching Theng Lew ,  Ananth Sundaram ,  Muhammed Shafi Kunnathodi ,  Praveen Paul Arotha ,  Varuna AnanthaPadmanabha Baipadi

IPC: H01L23/00 ,  G06F30/39 ,  H01L23/544 ,  H01L25/065

Abstract: Embodiments of the disclosure provide a structure including a passive component traversing multiple semiconductor chips, with related systems and methods. A structure of the disclosure includes a plurality of stacked semiconductor chips including a first chip coupled to a second chip through an interface. A passive component traverses the interface between the first chip and the second chip of the plurality of stacked semiconductor chips. The passive component includes a first portion within the first chip and a second portion within the second chip.

公开(公告)号：US20230178289A1

公开(公告)日：2023-06-08

申请号：US17543808

申请日：2021-12-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Varuna A. Baipadi ,  Venkata Narayana Rao Vanukuru ,  Muhammed Shafi Kunnathodi

IPC: H01F27/28 ,  H01F3/14

CPC classification number: H01F27/2804 ,  H01F3/14 ,  H01F2027/2809

Abstract: A structure includes a first layer having inductor windings. An inner area of the first layer is at least partially enclosed by the inductor windings and an outer area of the first layer is separated from the inner area by the inductor windings. This structure further includes a second layer having structural fill elements. The first layer and the second layer are parallel, and the second layer is relatively below the first layer in a direction perpendicular to the first layer. The density of the structural fill elements aligned below the inner area is less than the density of the structural fill elements aligned below the outer area.