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    Prefetch mechanism based on page table attributes
    1.
    发明申请
    Prefetch mechanism based on page table attributes 有权
    基于页表属性的预取机制

    公开(公告)号：US20060265552A1

    公开(公告)日：2006-11-23

    申请号：US11131582

    申请日：2005-05-18

    申请人： Gordon Davis ,  Thomas Genduso ,  Harold Kossman ,  Robert Todd

    发明人： Gordon Davis ,  Thomas Genduso ,  Harold Kossman ,  Robert Todd

    IPC分类号： G06F13/00

    CPC分类号： G06F12/0862 ,  G06F12/10 ,  G06F12/1027 ,  G06F2212/6024 ,  G06F2212/6026

    摘要： A prefetch mechanism using prefetch attributes is disclosed. In one aspect, an explicit request for data stored in a memory is provided, and a prefetch attribute in a page table entry associated with the explicit request is examined to determine whether to provide one or more prefetch requests based on the prefetch attribute. Another aspect includes determining dynamic prefetch attributes for use in prefetching data, in which prefetch attributes are adjusted based on memory access requests that target next sequential blocks of memory relative to the most recent previous access in a page of memory.

    摘要翻译： 公开了一种使用预取属性的预取机制。 在一个方面，提供对存储在存储器中的数据的显式请求，并且检查与显式请求相关联的页表条目中的预取属性，以基于预取属性来确定是否提供一个或多个预取请求。 另一方面包括确定用于在预取数据中使用的动态预取属性，其中基于存储器访问请求来调整预取属性，所述存储器访问请求相对于存储器页面中最近的先前存取的下一个顺序存储块。

    Performance of a cache by including a tag that stores an indication of a previously requested address by the processor not stored in the cache
    2.
    发明申请
    Performance of a cache by including a tag that stores an indication of a previously requested address by the processor not stored in the cache 失效
    缓存的性能包括一个标签，该标签存储未存储在高速缓存中的处理器先前请求的地址的指示

    公开(公告)号：US20050080995A1

    公开(公告)日：2005-04-14

    申请号：US10685054

    申请日：2003-10-14

    申请人： Gordon Davis ,  Thomas Genduso

    发明人： Gordon Davis ,  Thomas Genduso

    IPC分类号： G06F12/00 ,  G06F12/08 ,  G06F12/12

    CPC分类号： G06F12/126

    摘要： A method and system for improving the performance of a cache. The cache may include a tag entry that identifies the previously requested address by the processor whose data was not located in the cache. If the processor requests that address a second time, then there is a significant probability that the address will be accessed again. When the processor requests the address identified by the tag entry a second time, the cache is updated by inserting the data located at that address and evicting the data located in the least recently used entry. In this manner, data will not be evicted from the cache unless there is a significant probability that the data placed in the cache will likely be accessed again. Hence, data may not be evicted in the cache by the processor and replaced with data that will not be reused, such as in an interrupt routine.

    摘要翻译： 一种用于提高缓存性能的方法和系统。 缓存可以包括标识条目，其标识由数据未位于高速缓存中的处理器先前请求的地址。 如果处理器第二次请求该地址，则重新有可能再次访问该地址。 当处理器第二次请求由标签条目标识的地址时，通过插入位于该地址的数据并驱逐位于最近最少使用的条目中的数据来更新高速缓存。 以这种方式，除非存在可能再次访问缓存中的数据的重大概率，否则数据将不会从高速缓存中逐出。 因此，数据可能不会被处理器在高速缓存中驱逐，并且被替换为不被重用的数据，例如在中断程序中。