MULTIPLE-INPUT MULTIPLE-OUTPUT WIRELESS TRANSCEIVER ARCHITECTURE
    1.
    发明申请
    MULTIPLE-INPUT MULTIPLE-OUTPUT WIRELESS TRANSCEIVER ARCHITECTURE 有权
    多输入多输出无线收发器架构

    公开(公告)号:US20110019723A1

    公开(公告)日:2011-01-27

    申请号:US12842033

    申请日:2010-07-23

    IPC分类号: H04B1/38 H04L27/00

    摘要: A wireless transceiver contains a receiver and a transmitter. The receiver is operable in single-input single-output (SISO) mode as well as multiple-input multiple-output (MIMO) mode, and contains a pair of in-phase and quadrature signal processing chains and a baseband processor. In SISO mode, each of the processing chains in the pair is connected to receive a same modulated signal as input, and generates respective baseband outputs. The baseband processor processes the baseband outputs to demodulate the modulated signal. In MIMO mode, the signal processing chains in the pair receive different modulated signals and generate corresponding down-converted signals. The baseband processor processes the down-converted signals to demodulate the respective modulated signals received by the receiver. Corresponding techniques to provide MIMO in addition to SISO capabilities are implemented in the transmitter also. MIMO capability is thereby achieved in the wireless transceiver with minimal additional implementation area.

    摘要翻译: 无线收发器包含接收器和发射器。 接收机可以在单输入单输出(SISO)模式以及多输入多输出(MIMO)模式下工作,并且包含一对同相和正交信号处理链以及基​​带处理器。 在SISO模式中,该对中的每个处理链被连接以接收与输入相同的调制信号,并产生相应的基带输出。 基带处理器处理基带输出以解调调制信号。 在MIMO模式中,该对中的信号处理链接收不同的调制信号并产生相应的下变频信号。 基带处理器处理下变频信号以解调由接收机接收的各个调制信号。 除了SISO能力之外提供MIMO的相应技术也在发射机中实现。 从而在无线收发器中实现了MIMO能力,其最小的附加实现区域。

    Multiple-input multiple-output wireless transceiver architecture

    公开(公告)号:US09843378B2

    公开(公告)日:2017-12-12

    申请号:US12842033

    申请日:2010-07-23

    摘要: A wireless transceiver contains a receiver and a transmitter. The receiver is operable in single-input single-output (SISO) mode as well as multiple-input multiple-output (MIMO) mode, and contains a pair of in-phase and quadrature signal processing chains and a baseband processor. In SISO mode, each of the processing chains in the pair is connected to receive a same modulated signal as input, and generates respective baseband outputs. The baseband processor processes the baseband outputs to demodulate the modulated signal. In MIMO mode, the signal processing chains in the pair receive different modulated signals and generate corresponding down-converted signals. The baseband processor processes the down-converted signals to demodulate the respective modulated signals received by the receiver. Corresponding techniques to provide MIMO in addition to SISO capabilities are implemented in the transmitter also. MIMO capability is thereby achieved in the wireless transceiver with minimal additional implementation area.

    CLOSED LOOP TRANSMITTER IQ CALIBRATION
    3.
    发明申请
    CLOSED LOOP TRANSMITTER IQ CALIBRATION 有权
    闭环发射机IQ校准

    公开(公告)号:US20100099363A1

    公开(公告)日:2010-04-22

    申请号:US12253410

    申请日:2008-10-17

    IPC分类号: H04B7/00

    CPC分类号: H04B17/21 H04B17/10

    摘要: A novel and useful apparatus for and method of closed loop IQ calibration for use in a transmitter. The IQ calibration mechanism functions to provide calibration of IQ imbalance in the presence of real world RF impairments. An iterative process is used to update the gain and phase mismatch values whereby the metrics are calculated in a differential manner without the need for calculation absolute imbalance values. At each iteration, updating the gain and phase mismatch estimate requires only the direction of the correction to be determined. The direction of the correction is calculated using only the differences between output power measurements. The updated gain and phase mismatch estimates are used to update an IQ correction matrix. This process is repeated until a desired stopping criterion is reached. Gear shifting is used to ensure quick convergence of the algorithm while providing the ability to achieve any desired level of accuracy.

    摘要翻译: 一种用于发射机的闭环智能校准的新颖有用的装置和方法。 IQ校准机制用于在存在真实的RF损伤的情况下提供IQ不平衡的校准。 迭代过程用于更新增益和相位失配值,从而以差分方式计算度量,而不需要计算绝对不平衡值。 在每次迭代中,更新增益和相位失配估计只需要确定校正的方向。 仅使用输出功率测量之间的差异来计算校正的方向。 更新的增益和相位不匹配估计用于更新IQ校正矩阵。 重复该过程直到达到期望的停止标准。 齿轮移位用于确保算法的快速收敛,同时提供实现任何所需精度水平的能力。

    Distributed coexistence system for interference mitigation in a single chip radio or multi-radio communication device
    4.
    发明授权
    Distributed coexistence system for interference mitigation in a single chip radio or multi-radio communication device 有权
    用于单芯片无线电或多无线电通信设备中的干扰减轻的分布式共存系统

    公开(公告)号:US08724649B2

    公开(公告)日:2014-05-13

    申请号:US12325401

    申请日:2008-12-01

    IPC分类号: H04L12/413 H04B3/32

    摘要: A novel and useful apparatus for and method of distributed coexistence for mitigating interference in a single chip radio and/or a multi-radio (i.e. multi-transceiver) communications device. The invention enables coexistence ‘friendly’ radio IPs having frequency agility in that they are capable of shifting their clock frequencies thereby avoiding frequency bands of potential victim radios. Frequency agility on the aggressor radio side (rather than by mitigating the effect of interference on the victim radio side) prevents harmonics from the aggressor's clock scheme from falling in the operating frequency band of the victim radio, and in turn causing degradation to its performance. Each aggressor radio, based on information received from other radios, configures the root clock frequency of its RX and/or TX chain clock generation circuits.

    摘要翻译: 一种用于减轻单芯片无线电和/或多无线电(即多收发机)通信设备中的干扰的分布式共存的新颖有用的装置和方法。 本发明使具有频率敏捷性的共存“友好”无线IP成为能够移动其时钟频率从而避免潜在的受害者无线电的频带的共存的无线IP。 侵略者无线电侧的频率敏捷性(而不是通过减轻干扰对受害者无线电侧的影响)可以防止侵略者时钟方案的谐波落入受害者无线电的工作频带,从而导致其性能下降。 每个侵略者无线电设备基于从其他无线电接收的信息,配置其RX和/或TX链时钟生成电路的根时钟频率。

    Closed loop transmitter IQ calibration
    5.
    发明授权
    Closed loop transmitter IQ calibration 有权
    闭环发射机IQ校准

    公开(公告)号:US08175549B2

    公开(公告)日:2012-05-08

    申请号:US12253410

    申请日:2008-10-17

    IPC分类号: H04B17/00 H04B1/04

    CPC分类号: H04B17/21 H04B17/10

    摘要: A novel and useful apparatus for and method of closed loop IQ calibration for use in a transmitter. The IQ calibration mechanism functions to provide calibration of IQ imbalance in the presence of real world RF impairments. An iterative process is used to update the gain and phase mismatch values whereby the metrics are calculated in a differential manner without the need for calculation absolute imbalance values. At each iteration, updating the gain and phase mismatch estimate requires only the direction of the correction to be determined. The direction of the correction is calculated using only the differences between output power measurements. The updated gain and phase mismatch estimates are used to update an IQ correction matrix. This process is repeated until a desired stopping criterion is reached. Gear shifting is used to ensure quick convergence of the algorithm while providing the ability to achieve any desired level of accuracy.

    摘要翻译: 一种用于发射机的闭环智能校准的新颖有用的装置和方法。 IQ校准机制用于在存在真实的RF损伤的情况下提供IQ不平衡的校准。 迭代过程用于更新增益和相位失配值,从而以差分方式计算度量,而不需要计算绝对不平衡值。 在每次迭代中,更新增益和相位失配估计只需要确定校正的方向。 仅使用输出功率测量之间的差异来计算校正的方向。 更新的增益和相位不匹配估计用于更新IQ校正矩阵。 重复该过程直到达到期望的停止标准。 齿轮移位用于确保算法的快速收敛,同时提供实现任何所需精度水平的能力。

    DISTRIBUTED COEXISTENCE SYSTEM FOR INTERFERENCE MITIGATION IN A SINGLE CHIP RADIO OR MULTI-RADIO COMMUNICATION DEVICE
    6.
    发明申请
    DISTRIBUTED COEXISTENCE SYSTEM FOR INTERFERENCE MITIGATION IN A SINGLE CHIP RADIO OR MULTI-RADIO COMMUNICATION DEVICE 有权
    用于单芯片无线电或多无线电通信设备干扰减轻的分布式共存系统

    公开(公告)号:US20100137025A1

    公开(公告)日:2010-06-03

    申请号:US12325401

    申请日:2008-12-01

    IPC分类号: H04M1/00 H04B1/38

    摘要: A novel and useful apparatus for and method of distributed coexistence for mitigating interference in a single chip radio and/or a multi-radio (i.e. multi-transceiver) communications device. The invention enables coexistence ‘friendly’ radio IPs having frequency agility in that they are capable of shifting their clock frequencies thereby avoiding frequency bands of potential victim radios. Frequency agility on the aggressor radio side (rather than by mitigating the effect of interference on the victim radio side) prevents harmonics from the aggressor's clock scheme from falling in the operating frequency band of the victim radio, and in turn causing degradation to its performance. Each aggressor radio, based on information received from other radios, configures the root clock frequency of its RX and/or TX chain clock generation circuits.

    摘要翻译: 一种用于减轻单芯片无线电和/或多无线电(即多收发机)通信设备中的干扰的分布式共存的新颖有用的装置和方法。 本发明使具有频率敏捷性的共存“友好”无线IP成为能够移动其时钟频率从而避免潜在的受害者无线电的频带的共存的无线IP。 侵略者无线电侧的频率敏捷性(而不是通过减轻干扰对受害者无线电侧的影响)可以防止侵略者时钟方案的谐波落入受害者无线电的工作频带,从而导致其性能下降。 每个侵略者无线电设备基于从其他无线电接收的信息,配置其RX和/或TX链时钟生成电路的根时钟频率。

    Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection
    7.
    发明申请
    Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection 有权
    使用脉冲发生和选择,振荡器和RF频率之间具有非谐波比的本地振荡器

    公开(公告)号:US20080055010A1

    公开(公告)日:2008-03-06

    申请号:US11844453

    申请日:2007-08-24

    IPC分类号: H03B21/01 H03B21/00

    摘要: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The input signal is fed to a synthesizer timed to a rational multiplier of the RF frequency L/N fRF. The clock signal generated is divided by a factor Q to form 2Q phases of the clock at a frequency of L(N*Q) fRF, wherein each phase undergoes division by L. The phase signals are input to a pulse generator which outputs a plurality of pulses. The pulses are input to a selector which selects which signal to output at any point in time. By controlling the selector, the output clock is generated as a TDM based signal. Any spurs are removed by an optional filter.

    摘要翻译: 本地振荡器(LO)生成的新颖有用的装置和方法,其本地振荡器和RF频率之间具有非整数倍乘比。 所呈现的LO产生方案可用于以指定频率产生I和Q方波,同时避免众所周知的谐波拉动问题。 输入信号被馈送到合成器,其被定时到RF频率L / N f RF RF的有理乘数。 所产生的时钟信号除以因子Q以在L(N * Q)f RF RF的频率处形成时钟的2Q相位,其中每相经过除法L。相位信号被输入 涉及输出多个脉冲的脉冲发生器。 脉冲被输入到选择器,其选择在任何时间点输出哪个信号。 通过控制选择器,输出时钟作为基于TDM的信号产生。 任何杂项都可以通过可选过滤器去除。

    Robust communications system utilizing repetition code and cumulative decoder associated therewith
    8.
    发明授权
    Robust communications system utilizing repetition code and cumulative decoder associated therewith 失效
    利用重复码的鲁棒通信系统和与其相关的累积解码器

    公开(公告)号:US06826235B2

    公开(公告)日:2004-11-30

    申请号:US10035119

    申请日:2002-01-04

    IPC分类号: H04L2302

    摘要: A novel robust communications scheme whereby a repetition code at the transmitter and an associated cumulative decoder at the receiver are used to increase the reliability of transmission in a communications system. The robust communications scheme of the present invention is effective to increase the reliability of transmission by repetitively transmitting each data segment a number of times in accordance with a repetition code and subsequently collecting the received energy at the receiver over an accordingly longer period of time. Accumulating the received energy over a longer period of time at the receiver, yields a marked improvement in the signal to noise ratio (SNR) of the receiver.

    摘要翻译: 一种新颖的鲁棒通信方案,其中在发射机处的重复码和接收机处的相关联的累积解码器被用于增加通信系统中的传输的可靠性。 本发明的鲁棒通信方案通过根据重复码重复地发送每个数据段多次并且随后在相应更长的时间段内收集接收的能量,从而有效地提高了传输的可靠性。 在接收机上在更长的时间内累积接收到的能量,导致接收机的信噪比(SNR)的显着改善。

    System and method of flexible channel allocation in an ultra wideband (UWB) frequency hopping communication system
    9.
    发明授权
    System and method of flexible channel allocation in an ultra wideband (UWB) frequency hopping communication system 有权
    超宽带(UWB)跳频通信系统中灵活信道分配的系统和方法

    公开(公告)号:US07894503B2

    公开(公告)日:2011-02-22

    申请号:US11731932

    申请日:2007-04-02

    IPC分类号: H04B1/00

    摘要: A system and method of flexible channel allocation in an ultra wideband frequency hopping communication system is disclosed. In one embodiment, a method includes communicating radio signals through rapidly switching among a band group 6 according to a hopping pattern. The method also includes scanning the ultra wideband spectra to determine the band group 6 based on the hopping pattern of the radio signals.In another embodiment, a method includes scanning ultra wideband spectra to eliminate any frequency band of the ultra wideband spectra from a list of available frequency bands when the any frequency band is currently used, selecting a band group in combination of two or more frequency bands to communicate radio signals with an optimal transmission power and/or maximum range, and communicating the radio signals through rapidly switching among the band group.

    摘要翻译: 公开了一种在超宽带跳频通信系统中灵活的信道分配的系统和方法。 在一个实施例中,一种方法包括通过根据跳频图案在频带组6之间快速切换来传送无线电信号。 该方法还包括扫描超宽带频谱以基于无线电信号的跳频模式来确定频带组6。 在另一个实施例中,一种方法包括扫描超宽带频谱以从当前使用的任何频带的可用频带的列表中消除超宽带频谱的任何频带,选择两个或多个频带组合的频带组 以最佳发射功率和/或最大范围传送无线电信号,并通过频带组之间的快速切换来传送无线电信号。

    Range Extension and Noise Mitigation For Wireless Communication Links Utilizing a CRC Based Single and Multiple Bit Error Correction Mechanism
    10.
    发明申请
    Range Extension and Noise Mitigation For Wireless Communication Links Utilizing a CRC Based Single and Multiple Bit Error Correction Mechanism 有权
    利用基于CRC的单一和多位误差校正机制的无线通信链路的范围扩展和噪声抑制

    公开(公告)号:US20080288845A1

    公开(公告)日:2008-11-20

    申请号:US12118888

    申请日:2008-05-12

    摘要: A novel and useful range extension and in-band noise mitigation mechanism that uses conventional CRC error detection codes to correct single and multiple bit errors in packets received over a communications link. The CRC error correction mechanism of the invention is particularly suitable for use with communication protocols with weak error correction capabilities. The mechanism uses the linearity property of the CRC calculation to detect the existence of errors in the received packet. The entire received packet is searched for single bit errors and are corrected in a single cycle. If no single bit errors are found, the mechanism then searches for multiple bit errors. Packet retransmissions are used to detect and mark the location of multiple bit errors. Multiple bit errors are corrected by trying a plurality of hypotheses of single bit error corrections. Each hypotheses pattern is investigated to find matching CRC patterns for correction using the single bit, single cycle CRC error correction method.

    摘要翻译: 一种新颖有用的范围扩展和带内噪声减轻机制,其使用传统的CRC错误检测码来校正通过通信链路接收的分组中的单个和多个比特错误。 本发明的CRC纠错机制特别适用于具有弱纠错能力的通信协议。 该机制使用CRC计算的线性特性来检测接收到的数据包中是否存在错误。 搜索整个接收的数据包单个位错误,并在一个周期内进行纠正。 如果没有找到单个位错误,则机制将搜索多个位错误。 分组重传用于检测和标记多个位错误的位置。 通过尝试单个位错误校正的多个假设来校正多个位错误。 研究了每个假设模式,以使用单位,单周期CRC纠错方法找到用于校正的匹配CRC模式。