Auxiliary deflection winding driver disabling arrangement
    1.
    发明授权
    Auxiliary deflection winding driver disabling arrangement 失效
    辅助偏转线圈驱动器禁用布置

    公开(公告)号:US06369780B2

    公开(公告)日:2002-04-09

    申请号:US09409492

    申请日:1999-09-30

    IPC分类号: G09G108

    CPC分类号: H04N9/28

    摘要: In a video display, correction data for a digital convergence arrangement are stored in a first non-volatile memory. During power turn on procedure, the correction data are read out of and stored in a volatile memory. During each deflection cycle, the data stored in the volatile memory are successively read out and applied to an auxiliary convergence winding. When a parity error is detected in the read out data, an output and/or an input of a convergence amplifier is actively disabled to prevent a disturbance of a screen of the cathode ray tube.

    摘要翻译: 在视频显示中,用于数字会聚装置的校正数据被存储在第一非易失性存储器中。 在电源打开过程中,校正数据被读出并存储在易失性存储器中。 在每个偏转周期期间,存储在易失性存储器中的数据被连续读出并应用于辅助会聚线圈。 当在读出数据中检测到奇偶校验错误时,积极地禁止会聚放大器的输出和/或输入,以防止阴极射线管的屏幕的干扰。

    Distortion correction system with switchable digital filter
    2.
    发明授权
    Distortion correction system with switchable digital filter 有权
    具有可切换数字滤波器的失真校正系统

    公开(公告)号:US06292235B1

    公开(公告)日:2001-09-18

    申请号:US09408359

    申请日:1999-09-29

    IPC分类号: H04N322

    CPC分类号: H04N9/31 H04N3/2335 H04N3/27

    摘要: A switchable digital filter interpolates distortion correction values. The distortion correction values together with interpolated distortion correction values are supplied as an output. Proper operation of the digital filter is disturbed by transient signals occurring during horizontal retrace. The digital output is converted to an analog convergence correction signal. The digital to analog converter has an operating frequency and generates a transient signal during horizontal retrace as the operating frequency increases due to an increased horizontal scanning rate. A low pass filter receives the analog convergence correction signal and generates an analog deflection signal. An auxiliary deflection coil is driven by the analog deflection signal. The digital filter is switched off during the horizontal retrace. The digital filter is thus protected from disturbance by the transient signal and the digital to analog converter is protected from exceeding a maximum operating frequency.

    摘要翻译: 可切换数字滤波器内插失真校正值。 作为输出,提供失真校正值和内插失真校正值。 数字滤波器的正确操作受到水平回扫期间发生的瞬态信号的干扰。 数字输出转换为模拟会聚校正信号。 数字到模拟转换器具有工作频率,并且在水平扫描速率增加时工作频率增加时,在水平回扫期间产生瞬态信号。 低通滤波器接收模拟会聚校正信号并产生模拟偏转信号。 辅助偏转线圈由模拟偏转信号驱动。 数字滤波器在水平回扫期间关闭。 数字滤波器因此受到瞬态信号的干扰,防止数模转换器超过最大工作频率。

    Adaptable raster distortion correction system for multiple horizontal scanning frequencies
    3.
    发明授权
    Adaptable raster distortion correction system for multiple horizontal scanning frequencies 失效
    适用于多个水平扫描频率的光栅失真校正系统

    公开(公告)号:US06486926B1

    公开(公告)日:2002-11-26

    申请号:US09408378

    申请日:1999-09-29

    IPC分类号: H04N323

    CPC分类号: H04N3/2335 H04N9/28

    摘要: A memory and a switchable digital filter supply different numbers of digital distortion correction values. The supplied distortion correction values are converted to an analog distortion correction signal. A passive, analog low pass filter for the analog distortion correction signal generates an analog deflection signal. The low pass filter is optimized only for those of the analog deflection signals having a given sample rate. A controller varies the different numbers of the supplied distortion correction values to maintain the given sample rate of the analog deflection signal for different horizontal scanning rates. The controller selectively implements respective operating modes for different horizontal scanning frequencies in which no interpolated distortion correction values are supplied or different numbers of interpolated distortion correction values are supplied.

    摘要翻译: 存储器和可切换数字滤波器提供不同数量的数字失真校正值。 所提供的失真校正值被转换成模拟失真校正信号。 用于模拟失真校正信号的无源模拟低通滤波器产生模拟偏转信号。 低通滤波器仅针对具有给定采样率的模拟偏转信号的优化。 控制器改变提供的失真校正值的不同数量,以维持模拟偏转信号的给定采样率,以获得不同的水平扫描速率。 控制器选择性地对不提供内插失真校正值的不同水平扫描频率实施相应的操作模式,或提供不同数目的内插失真校正值。

    Circuit for correction of deflection errors in a television display
    4.
    发明授权
    Circuit for correction of deflection errors in a television display 失效
    用于校正电视显示器中偏转误差的电路

    公开(公告)号:US06362579B1

    公开(公告)日:2002-03-26

    申请号:US09588872

    申请日:2000-06-06

    IPC分类号: G09G104

    CPC分类号: H04N3/2335

    摘要: A circuit for correction of deflection errors in a television set, in which a correction current having alternate forward-sweep and flyback periods is supplied to a correction coil for an error parameter. An amplitude of the correction current is reduced during a time window which corresponds to the flyback period and in which no visible picture is displayed.

    摘要翻译: 一种用于校正电视机中的偏转误差的电路,其中具有交替的前扫和反激周期的校正电流被提供给用于误差参数的校正线圈。 在对应于回扫周期的时间窗口内,校正电流的幅度减小,并且其中不显示可视图像。

    Display correction waveform generator for multiple scanning frequencies
    5.
    发明授权
    Display correction waveform generator for multiple scanning frequencies 失效
    用于多个扫描频率的显示校正波形发生器

    公开(公告)号:US06774585B2

    公开(公告)日:2004-08-10

    申请号:US10168603

    申请日:2002-11-04

    IPC分类号: G09G104

    CPC分类号: H04N3/27 H04N3/26

    摘要: A method for generating display correction waveforms for a CRT display comprises the steps of selecting one of a plurality of trace portions for forming part of a correction waveform, the trace portions having different average values. Completing each of the correction waveform by combining each selected trace portion with a respective retrace portion such that all completed correction waveforms have a predetermined average value. The correction waveforms may have vertical and/or horizontal rates.

    摘要翻译: 一种用于产生CRT显示器的显示校正波形的方法包括以下步骤:选择多个迹线部分之一以形成校正波形的一部分,迹线部分具有不同的平均值。 通过将每个所选择的跟踪部分与相应的回扫部分组合来完成每个校正波形,使得所有完成的校正波形具有预定的平均值。 校正波形可以具有垂直和/或水平速率。

    Grid correction circuit for TV sets
    6.
    发明授权
    Grid correction circuit for TV sets 失效
    电视机电网校正电路

    公开(公告)号:US5283504A

    公开(公告)日:1994-02-01

    申请号:US920360

    申请日:1992-07-29

    CPC分类号: H04N3/22

    摘要: A grid correction circuit for a television receiver includes a first memory for storing correction values for correcting the deflection current of the television receiver. A second memory perodically provides a test signal to a correction coil to correct the deflection of the television receiver. A switch periodically selectively connects the first memory to the correction coil and a correction current flows through the correction coil. The switch also periodically connects the second memory to the correction coil and a test current flows through the correction coil. An impedance is responsive to the correction coil and produces a correction voltage and a test voltage in response to the correction current and the test current respectively. A comparator receives the test voltage and compares the test voltage to a reference voltage and provides an output voltage having a first level when the test voltage is below the reference voltage and a second level when the test voltage is above the reference voltage. A processor receives the output voltage and changes the correction voltage to incrementally reciprocate above and below the reference voltage by a preslected increment to maintain the correction voltage at substantially the same level as the reference voltage over a long time period.

    摘要翻译: 用于电视接收机的格栅校正电路包括用于存储用于校正电视接收机的偏转电流的校正值的第一存储器。 第二存储器向校正线圈提供测试信号以校正电视接收机的偏转。 开关周期性选择性地将第一存储器连接到校正线圈,并且校正电流流过校正线圈。 开关还周期性地将第二存储器连接到校正线圈,并且测试电流流过校正线圈。 阻抗响应于校正线圈并分别响应于校正电流和测试电流产生校正电压和测试电压。 比较器接收测试电压并将测试电压与参考电压进行比较,并且当测试电压低于参考电压时提供具有第一电平的输出电压,并且当测试电压高于参考电压时提供第二电平。 处理器接收输出电压并改变校正电压以在参考电压之上和之下递增地往复运动一个预设的增量,以将校正电压维持在与参考电压相当长的时间段基本相同的水平。

    Driving circuit with several sensors
    7.
    发明授权
    Driving circuit with several sensors 失效
    驱动电路与几个传感器

    公开(公告)号:US5847592A

    公开(公告)日:1998-12-08

    申请号:US617765

    申请日:1996-09-20

    CPC分类号: H03K5/082

    摘要: Control circuit for producing output voltages from a plurality of sensor signals, wherein each of the sensor signals are identical and mutually phase shifted. The control circuit comprises a plurality of comparators for producing the output voltages, wherein each comparator is respectively supplied with one of the sensor signals and with an amount of hysteresis which depends on the amplitude of one or more of the respective other sensor signals. The control circuit further comprises electronic circuitry for deriving the respective amount of comparator hysteresis for each of the comparators from the amplitude of one or more of the respective other sensor signals.

    摘要翻译: PCT No.PCT / EP94 / 03050 Sec。 371日期:1996年9月20日 102(e)1996年9月20日PCT PCT 1994年9月13日PCT公布。 公开号WO95 / 08869 日期1995年3月30日用于从多个传感器信号产生输出电压的控制电路,其中每个传感器信号相同并相互相移。 控制电路包括用于产生输出电压的多个比较器,其中每个比较器分别被提供有一个传感器信号,并具有取决于相应的其它传感器信号中的一个或多个的振幅的滞后量。 控制电路还包括电子电路,用于从相应的其它传感器信号中的一个或多个的幅度导出每个比较器的相应比较器滞后量。

    Method and apparatus for monitoring an alternating signal
    8.
    发明授权
    Method and apparatus for monitoring an alternating signal 失效
    用于监视交变信号的方法和装置

    公开(公告)号:US5856751A

    公开(公告)日:1999-01-05

    申请号:US123920

    申请日:1993-09-20

    CPC分类号: H02H3/46 H02H7/0844

    摘要: An arrangement for monitoring an alternating signal with respect to its state as mark-to-space ratio or direct-current component, in which the alternating signal is modified so that its mark-to-space ratio or direct-current component can be detected by simple comparison with reference signals. Various information is then transmitted over a line, and the operation of the stage that generates the alternating signal can also be monitored.

    摘要翻译: 用于监视相对于其状态的交替信号作为标称空间比或直流分量的装置,其中交替信号被修改,使得其标称空间比或直流分量可以由 简单的参考信号比较。 然后通过一行传送各种信息,并且还可以监视产生交替信号的级的操作。

    Method and apparatus for obtaining correction values for video lines of
a video frame
    9.
    发明授权
    Method and apparatus for obtaining correction values for video lines of a video frame 失效
    用于获得视频帧的视频行的校正值的方法和装置

    公开(公告)号:US6108054A

    公开(公告)日:2000-08-22

    申请号:US896641

    申请日:1997-07-18

    IPC分类号: H04N9/28 H04N7/00

    CPC分类号: H04N9/28

    摘要: A method and apparatus for obtaining correction values for convergence setting in video projection devices includes calculating the correction values for the individual video lines at least in part by interpolation between correction interpolation point values. The correction interpolation point values are in this case distributed in the form of a grid over the screen area of the video projection device. During the calculation of correction values for the video lines of a first field of the video frame, a respective set of two intermediate or final values for the interpolation is calculated, which set is applicable to neighbouring lines in different video fields, but in each case only one intermediate or final value is used for the convergence correction in the current video line. As a result, optimal convergence correction can be set for each video line without a high memory outlay and without high computing complexity.

    摘要翻译: 用于获得视频投影设备中的会聚设置的校正值的方法和装置包括至少部分地通过校正插值点值之间的内插来计算各视频行的校正值。 在这种情况下,校正插值点值以视频投影设备的屏幕区域上的网格的形式分布。 在计算视频帧的第一场的视频行的校正值期间,计算用于内插的两组中间值或最终值的相应集合,该集合适用于不同视频场中的相邻行,但是在每种情况下 当前视频行中只有一个中间值或最终值用于会聚校正。 因此,可以为每个视频线路设置最佳的收敛校正,而不需要高的存储器支出,并且没有高的计算复杂度。

    Circuit arrangement for genrating square-shaped signals
    10.
    发明授权
    Circuit arrangement for genrating square-shaped signals 失效
    用于产生方形信号的电路布置

    公开(公告)号:US5394023A

    公开(公告)日:1995-02-28

    申请号:US61359

    申请日:1993-05-14

    IPC分类号: H03K3/0233 H03K5/01 H03K5/153

    CPC分类号: H03K3/02337

    摘要: A first input signal has successive zero amplitude crossings. A first comparator generates a first bilevel output signal responsive to the first input signal. The first comparator has a hysteresis characteristic which is switched on at each said zero crossing of the first input signal and switched off prior to each occurrence of the next following zero crossing. A second input signal has successive zero amplitude crossings and is displaced in phase relative to the first input signal. A second comparator generates a second bilevel output signal responsive to the second input signal. The hysteresis characteristic is switched on by level transitions of the first bilevel output signal and switched off by level transitions of the second bilevel output signal. The first and second input signals may be sinusoidal. The hysteresis characteristic may controlled by first and second flip/flops, which are set by the first bilevel output signal and reset by the second bilevel output signal.

    摘要翻译: 第一输入信号具有连续的零幅度交叉。 第一比较器响应于第一输入信号产生第一双电平输出信号。 第一比较器具有在第一输入信号的每个所述过零点处接通的滞后特性,并且在下一个跟随过零点的每次出现之前被关断。 第二输入信号具有连续的零幅度交叉并且相对于第一输入信号相位移位。 第二比较器响应于第二输入信号产生第二双电平输出信号。 滞后特性通过第一个双电平输出信号的电平转换而被接通,并由第二个双电平输出信号的电平转换关断。 第一和第二输入信号可以是正弦的。 滞后特性可由第一和第二触发器控制,第一和第二触发器由第一双电平输出信号设置并由第二双电平输出信号复位。