公开(公告)号：US20210118655A1

公开(公告)日：2021-04-22

申请号：US16623511

申请日：2018-04-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Daichi MASUKO ,  Hajime NISHIMURA ,  Yasumasa HAMANA ,  Hiroyuki WATANABE

IPC: H01J43/24

Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer comprised of an insulating material includes a metal layer in which a plurality of metal particles comprised of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween, the metal layer having a thickness set to 5 to 40 angstroms.

公开(公告)号：US20220230860A1

公开(公告)日：2022-07-21

申请号：US17609519

申请日：2020-05-12

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Terunori KAWAI ,  Yoshitaka TORII ,  Masami SHIBAYAMA ,  Hiroyuki WATANABE ,  Shinichi YAMASHITA

IPC: H01J43/08 ,  H01J9/12 ,  H01J43/18

Abstract: A photocathode including a substrate, a photoelectric conversion layer provided on the substrate and generating photoelectrons in response to incidence of light, and an underlayer provided between the substrate and the photoelectric conversion layer and containing beryllium, in which the underlayer has a first underlayer containing a nitride of beryllium.

公开(公告)号：US20220148848A1

公开(公告)日：2022-05-12

申请号：US17430019

申请日：2019-11-22

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Yasumasa HAMANA ,  Hiroyuki WATANABE ,  Kenshi SHIMANO ,  Hiroji NISHIZAWA

IPC: H01J37/22 ,  H01J9/22

Abstract: A method of manufacturing a phosphor panel includes: forming a phosphor layer having a plurality of phosphor particles on an exit window; forming an organic film on the phosphor layer; forming a metal reflection film on the organic film; forming an oxide film on the metal reflection film; removing the organic film by firing; and forming an oxide film integrally covering a surface of the metal reflection film and surfaces of the phosphor particles by atomic layer deposition.

公开(公告)号：US20200176236A1

公开(公告)日：2020-06-04

申请号：US16624027

申请日：2018-04-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Daichi MASUKO ,  Yasumasa HAMANA ,  Hajime NISHIMURA ,  Hiroyuki WATANABE

IPC: H01J43/24

Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer comprised of an insulating material is configured using a single metal layer in which a plurality of metal particles comprised of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween.

公开(公告)号：US20210134572A1

公开(公告)日：2021-05-06

申请号：US16623517

申请日：2018-04-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Daichi MASUKO ,  Hajime NISHIMURA ,  Yasumasa HAMANA ,  Hiroyuki WATANABE

IPC: H01J43/24

Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. The electron multiplier includes a resistance layer sandwiched between a substrate and a secondary electron emitting layer and configured using a Pt layer two-dimensionally formed on a layer formation surface which is coincident with or substantially parallel to a channel formation surface of the substrate. The resistance layer has a temperature characteristic within a range in which a resistance value at −60° C. is 10 times or less, and a resistance value at +60° C. is 0.25 times or more, relative to a resistance value at a temperature of 20° C.