公开(公告)号：US20240315053A1

公开(公告)日：2024-09-19

申请号：US18184222

申请日：2023-03-15

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： JINSUNG YOUN ,  Xia Sheng ,  James Ignowski ,  Darrin Miller ,  Catherine Graves

IPC: H10B80/00 ,  H01L23/00

CPC classification number: H10B80/00 ,  H01L24/16 ,  H01L24/17 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2924/1433 ,  H01L2924/1443

Abstract: Examples of the present technology provide heterogeneous (i.e., multi-chip) ASIC-memristor integrations that enable high voltage-dependent precision memristor programming while preserving optimal ASIC performance/capabilities. Examples achieve these advantages by “de-coupling” memristor hardware from ASIC chip. Accordingly, a heterogeneous ASIC-memristor integration of the present technology may comprise an ASIC chip packaged onto a functional “memristor-interposer” chip. The memristor interposer may serve both a functional and structural purpose. Namely, memristors of the memristor interposer can be leveraged in conjunction with the ASIC for processing/computation functions—while connections within the memristor interposer route signals between ASIC and computing system (e.g., between the ASIC and a printed circuit board).