公开(公告)号：US20190179541A1

公开(公告)日：2019-06-13

申请号：US16274189

申请日：2019-02-12

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Derek Alan Sherlock ,  Shawn Walker

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0685

Abstract: A system comprises a processor, a memory fabric, and a fabric bridge coupled to the memory fabric and the processor. The fabric bridge may receive, from the processor a first eviction request comprising first eviction data, transmit, to the processor, a message indicating the fabric bridge has accepted the first eviction request, transmit a first write comprising the first eviction data to the fabric, receive, from the processor, a second eviction request comprising second eviction data, and transmit a second write comprising the second eviction data to the fabric. Responsive to transmitting the second write request, the fabric bridge may transmit, to the processor, a message indicating the fabric bridge accepted the second eviction request, determine that the first write and the second write have persisted, and transmit, to the processor, a notification to the processor responsive to determining that the first write and the second write have persisted.

公开(公告)号：US20190012222A1

公开(公告)日：2019-01-10

申请号：US15645105

申请日：2017-07-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Derek Alan Sherlock ,  Shawn Walker ,  Paolo Faraboschi

IPC: G06F11/07 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56

Abstract: In some examples, a controller includes a counter to track errors associated with a group of memory access operations, and processing logic to detect an error associated with the group of memory access operations, determine whether the detected error causes an error state change of the group of memory access operations, and cause advancing of the counter responsive to determining that the detected error causes the error state change of the group of memory access operations.

公开(公告)号：US10228884B2

公开(公告)日：2019-03-12

申请号：US15453212

申请日：2017-03-08

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Derek Alan Sherlock ,  Shawn Walker

IPC: G06F12/00 ,  G06F13/00 ,  G06F3/06

Abstract: A system comprises a processor, a memory fabric, and a fabric bridge coupled to the memory fabric and the processor. The fabric bridge may receive, from the processor a first eviction request comprising first eviction data, transmit, to the processor, a message indicating the fabric bridge has accepted the first eviction request, transmit a first write comprising the first eviction data to the fabric, receive, from the processor, a second eviction request comprising second eviction data, and transmit a second write comprising the second eviction data to the fabric. Responsive to transmitting the second write request, the fabric bridge may transmit, to the processor, a message indicating the fabric bridge accepted the second eviction request, determine that the first write and the second write have persisted, and transmit, to the processor, a notification to the processor responsive to determining that the first write and the second write have persisted.

公开(公告)号：US10649829B2

公开(公告)日：2020-05-12

申请号：US15645105

申请日：2017-07-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Derek Alan Sherlock ,  Shawn Walker ,  Paolo Faraboschi

IPC: G06F11/00 ,  G06F11/07 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56 ,  G11C29/52

Abstract: In some examples, a controller includes a counter to track errors associated with a group of memory access operations, and processing logic to detect an error associated with the group of memory access operations, determine whether the detected error causes an error state change of the group of memory access operations, and cause advancing of the counter responsive to determining that the detected error causes the error state change of the group of memory access operations.

公开(公告)号：US10691348B2

公开(公告)日：2020-06-23

申请号：US16274189

申请日：2019-02-12

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Derek Alan Sherlock ,  Shawn Walker

IPC: G06F12/00 ,  G06F13/00 ,  G06F3/06

Abstract: A system comprises a processor, a memory fabric, and a fabric bridge coupled to the memory fabric and the processor. The fabric bridge may receive, from the processor a first eviction request comprising first eviction data, transmit, to the processor, a message indicating the fabric bridge has accepted the first eviction request, transmit a first write comprising the first eviction data to the fabric, receive, from the processor, a second eviction request comprising second eviction data, and transmit a second write comprising the second eviction data to the fabric. Responsive to transmitting the second write request, the fabric bridge may transmit, to the processor, a message indicating the fabric bridge accepted the second eviction request, determine that the first write and the second write have persisted, and transmit, to the processor, a notification to the processor responsive to determining that the first write and the second write have persisted.