公开(公告)号：US20200371909A1

公开(公告)日：2020-11-26

申请号：US16755815

申请日：2018-01-29

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： JEFFREY KEVIN JEANSONNE ,  ROSILET RETNAMONI BRADUKE ,  DAVID PLAQUIN ,  JOSHUA SERRATELLI SCHIFFMAN

IPC: G06F12/02 ,  G06F12/0891 ,  G06F12/0831 ,  G06F12/0853

Abstract: An apparatus includes a solid-state a solid-state non-volatile computer memory; and a controller coupled to the memory. The controller to: generate a data set including a tag that indicates that the data set is valid; write the data set into a block of the memory, wherein the block includes multiple addressable locations set to a common first binary value before the write; generate a subsequent data set including a tag that indicates that the subsequent data set is valid; update the tag of the written data set to indicate that the written data set is invalid, wherein the update includes setting an addressable location corresponding to the tag to second binary value different from the first binary value; write the subsequent data set to addressable locations in the block of memory other than the addressable locations of the invalid data set.

公开(公告)号：US20210182434A1

公开(公告)日：2021-06-17

申请号：US16771181

申请日：2018-03-12

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： ADRIAN BALDWIN ,  JAMES ROBERT WALDRON ,  DAVID PLAQUIN

IPC: G06F21/72 ,  H04L9/08 ,  G06F21/57 ,  H04L9/32

Abstract: In an example, there is provided a method for attesting to a management state of a device platform configuration, based on a signed data structure that represents a device management status and a time-based value from a secure cryptoprocessor of the device. The signed data structure is sent to a management system for validation based on a comparison to the state of the cryptoprocessor at the time of signing the data structure.

公开(公告)号：US20230409756A1

公开(公告)日：2023-12-21

申请号：US18249318

申请日：2020-10-29

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： ADRIAN JOHN BALDWIN ,  PIERRE BELGARRIC ,  CHRISTOPHER IAN DALTON ,  DANIEL CAMERON ELLAM ,  DAVID PLAQUIN

IPC: G06F21/64 ,  H04L9/32 ,  H04L9/08

CPC classification number: G06F21/645 ,  H04L9/3242 ,  H04L9/0825

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a control module. The control module is to protect information regarding a machine learning model owned by a third party. The information is protected in a memory communicatively coupled to the control module. In response to receiving an indication that a computing device under control of the control module complies with a third party policy associated with the machine learning model, the control module is to release the information to the computing device.

公开(公告)号：US20230396435A1

公开(公告)日：2023-12-07

申请号：US18249164

申请日：2020-10-29

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： ADRIAN JOHN BALDWIN ,  CHRISTOPHER IAN DALTON ,  PIERRE BELGARRIC ,  DAVID PLAQUIN ,  DANIEL CAMERON ELLAM

IPC: H04L9/30 ,  G06N20/00

CPC classification number: H04L9/30 ,  G06N20/00

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a control module. The control module determines whether a computing device communicatively coupled to the control module is in a specified state for executing a machine learning model controlled by a third party entity. In response to determining that the computing device is in the specified state, the control module is to send, to an attestation module in a data processing pipeline associated with the computing device, an indication that the computing device is in the specified state.

公开(公告)号：US20230261857A1

公开(公告)日：2023-08-17

申请号：US18249041

申请日：2020-10-29

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： ADRIAN JOHN BALDWIN ,  CHRISTOPHER IAN DALTON ,  PIERRE BELGARRIC ,  DANIEL CAMERON ELLAM ,  DAVID PLAQUIN

IPC: H04L9/08 ,  G06F21/64 ,  H04L9/00

CPC classification number: H04L9/0825 ,  G06F21/64 ,  H04L9/50

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a generating module, a signing module and an interfacing module. The generating module is to generate a statement comprising: a control plane indicator to indicate a control plane state of a computing device used to execute a machine learning model. The statement further comprises information regarding the machine learning model. The signing module is to generate a signature for the statement using an attestation key associated with the apparatus. The interfacing module is to send the statement and the signature to a requesting entity.

公开(公告)号：US20170262352A1

公开(公告)日：2017-09-14

申请号：US15329877

申请日：2014-09-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： JEFFREY KEVIN JEANSONNE ,  BORIS BALACHEFF ,  VALIUDDIN ALI ,  CHRIS I DALTON ,  DAVID PLAQUIN

IPC: G06F11/30 ,  G06F9/44 ,  G06F21/57

CPC classification number: G06F11/302 ,  G06F11/3003 ,  G06F11/3419 ,  G06F11/3466 ,  G06F21/566 ,  G06F21/572 ,  G06F21/575 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/88

Abstract: Examples herein disclose monitoring an expected functionality upon execution of a system management mode (SMM) BIOS code. The examples detect whether a change has occurred to the SMM BIOS code based on the monitoring of the expected functionality. The change indicates that the SMM BIOS code is compromised.