公开(公告)号：US20160063254A1

公开(公告)日：2016-03-03

申请号：US14780977

申请日：2013-04-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： JEFFREY KEVIN JEANSONNE ,  JON G LLOYD ,  RAHUL V LAKDAWALA ,  JUSTIN C PRINDLE

IPC: G06F21/57 ,  G06F21/60

CPC classification number: G06F21/575 ,  G06F21/606 ,  G06F2221/034

Abstract: A controller monitors for an indication from core logic indicating that the core logic is in a state in which the core logic does not access a bus. In response to detecting the indication, the controller retrieves the system boot code from a non-volatile memory over the bus.

Abstract translation: 控制器监视来自核心逻辑的指示，指示核心逻辑处于核心逻辑不访问总线的状态。 响应于检测到该指示，控制器通过总线从非易失性存储器检索系统引导代码。

公开(公告)号：US20210397234A1

公开(公告)日：2021-12-23

申请号：US16758140

申请日：2018-02-07

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： RICHARD S LIN ,  QIJUN CHEN ,  ROGER D BENSON ,  JON G LLOYD

IPC: G06F1/26 ,  G06F13/42

Abstract: A technique includes determining first power received via a first serial bus connector of the machine; and allocating a second power communicated via a second serial bus connector of the machine based on the determined first power.