公开(公告)号：US20210224220A1

公开(公告)日：2021-07-22

申请号：US16768205

申请日：2019-10-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Sirena LU ,  Rogelio CICILI ,  James Michael GARDNER ,  Scott A. LINN

IPC: G06F13/42 ,  B41J2/175 ,  G01F23/00

Abstract: A logic circuitry package for a replaceable print apparatus component comprises at least one logic circuit and an interface to communicate with a print apparatus logic circuit. The at least one logic circuit is configured to receive, via the interface, calibration parameters including an offset parameter and a sensor ID. The at least one logic circuit is configured to output, via the interface, a digital value corresponding to the sensor ID and offset based on the offset parameter.

公开(公告)号：US20240051292A1

公开(公告)日：2024-02-15

申请号：US18266803

申请日：2021-01-11

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Vincent C. KORTHUIS ,  Rogelio CICILI ,  Eric T. MARTIN ,  Kellie Susanne JENSEN ,  James R. PRZYBYLA

IPC: B41J2/045

CPC classification number: B41J2/0458 ,  B41J2/04541 ,  B41J2/04543

Abstract: In some examples, a fluidic die includes fluidic actuators, switches, and electrically conductive lines in an electrically conductive layer of the fluidic die. The electrically conductive lines electrically connect the switches to respective actuators. A first dimension of a first electrically conductive line is different from a second dimension of a second electrically conductive line to match a first resistance of the first electrically conductive line having a first length to a second resistance of the second electrically conductive line having a second length different from the first length.