公开(公告)号：US20230081336A1

公开(公告)日：2023-03-16

申请号：US17989354

申请日：2022-11-17

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Scott A. LINN ,  James Michael GARDNER ,  Michael W. Cumbie

IPC: B41J2/045

Abstract: A fluidic die including an array of fluid actuating devices addressable by a set of addresses, and an array of memory elements including a first portion to receive a first set of address bits representative of a first portion of an address of the set of addresses, and a second portion to receive a second set of address bits representative of a second portion of the address of the set of addresses. A first address driver is to provide a first portion of the address of the set of addresses based on the first set of address bits received by the first portion of memory elements, and a second address driver is to provide a remaining portion of the address of the set of addresses based on a second set of address bits received by the second portion of memory elements.

公开(公告)号：US20210402784A1

公开(公告)日：2021-12-30

申请号：US16769923

申请日：2019-10-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Stephen D. PANSHIN ,  Jefferson P. WARD ,  James Michael GARDNER ,  Anthony D. STUDER ,  David N. OLSEN ,  Quinton B. WEAVER ,  David Owen ROETHIG ,  Christopher Hans BAKKER ,  David B. NOVAK

IPC: B41J2/175

Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and a logic circuit having a communication address to communicate with the print apparatus logic circuit. The logic circuit is configured to detect, via the interface, communications that include an other communication address. The logic circuit is configured to respond, via the interface, to a command series directed to the logic circuit that include the communication address of the logic circuit, based on the detected communications.

公开(公告)号：US20210229425A1

公开(公告)日：2021-07-29

申请号：US16768046

申请日：2019-02-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Scott A. LINN ,  James Michael GARDNER ,  Michael W. CUMBIE

IPC: B41J2/045

Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a configuration register, a plurality of interfaces, and control logic. The plurality of interfaces include a mode interface and a data interface. The control logic enables writing to the configuration register in response to a signal on the mode interface transitioning to logic high with a logic high signal on the data interface.

公开(公告)号：US20210224220A1

公开(公告)日：2021-07-22

申请号：US16768205

申请日：2019-10-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Sirena LU ,  Rogelio CICILI ,  James Michael GARDNER ,  Scott A. LINN

IPC: G06F13/42 ,  B41J2/175 ,  G01F23/00

Abstract: A logic circuitry package for a replaceable print apparatus component comprises at least one logic circuit and an interface to communicate with a print apparatus logic circuit. The at least one logic circuit is configured to receive, via the interface, calibration parameters including an offset parameter and a sensor ID. The at least one logic circuit is configured to output, via the interface, a digital value corresponding to the sensor ID and offset based on the offset parameter.

公开(公告)号：US20210221134A1

公开(公告)日：2021-07-22

申请号：US16768066

申请日：2019-02-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： James Michael GARDNER ,  Scott A. LINN ,  George H. CORRIGAN

IPC: B41J2/14 ,  B41J2/045 ,  B41J2/175

Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a contact pad and a programmable pulldown device. The programmable pulldown device is electrically coupled to the contact pad. The programmable pulldown device is settable to any one of a plurality of resistances.

公开(公告)号：US20210129527A1

公开(公告)日：2021-05-06

申请号：US16959068

申请日：2019-02-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： James Michael GARDNER ,  Scott A. LINN

IPC: B41J2/045

Abstract: An integrated circuit to drive fluid actuators is disclosed. The integrated circuit includes delay circuits coupled in series and to a fire input to receive a fire signal in succession. Each delay circuit receives the fire signal and, after a delay, provides the fire signal via an output to a corresponding fluid actuator. A programmable frequency generator is coupled to each of the of delay circuits. The programmable frequency generator provides a clock signal having an adjustable frequency to control the delay.

公开(公告)号：US20200171836A1

公开(公告)日：2020-06-04

申请号：US16502479

申请日：2019-07-03

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： James Michael GARDNER ,  Scott A. LINN ,  Stephen D. PANSHIN ,  Jefferson P. WARD ,  David Owen ROETHIG ,  David N. OLSEN ,  Anthony D. STUDER ,  Michael W. CUMBIE ,  Sirena Chi LU

IPC: B41J2/175

Abstract: A logic circuit for a replaceable print component is configured to, in response to a plurality of commands including a first command specifying the new I2C communications address and a first calibration parameter, a second command specifying the new I2C communications address and a second calibration parameter, a third command specifying the new I2C communications address and a class parameter, and/or fourth commands specifying the new I2C communications address and sub-class parameters, and at least one read request, generate count values in a count value range defined by a highest and lowest count value.

公开(公告)号：US20230081878A1

公开(公告)日：2023-03-16

申请号：US17991978

申请日：2022-11-22

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Scott A. LINN ,  James Michael GARDNER

IPC: B41J2/045 ,  G11C13/00

Abstract: An integrated circuit for a print component including a number of memory bits. The integrated circuit may include a selection circuit to select at least one memory bit of the number of memory bits and fire actuators of a fire pulse group. The integrated circuit may include a memory voltage regulator to provide a write voltage to the at least one memory bit of the number of memory bits.

公开(公告)号：US20220129570A1

公开(公告)日：2022-04-28

申请号：US17569273

申请日：2022-01-05

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： James Michael GARDNER ,  Scott A. LINN ,  Stephen D. PANSHIN ,  Jefferson P. WARD ,  David Owen ROETHIG

IPC: G06F21/60 ,  B41J2/175 ,  G06F13/42 ,  G06F21/44

Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.

公开(公告)号：US20210402787A1

公开(公告)日：2021-12-30

申请号：US16959380

申请日：2019-10-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Scott A. LINN ,  James Michael GARDNER ,  Michael W CUMBIE

IPC: B41J2/175 ,  G01F23/24

Abstract: A sensor circuitry package for a replaceable print apparatus component including a plurality of sensing zones, each sensing zone including a number of sensing devices, each sensing device having a respective sensing function, and an array of memory elements, each memory element corresponding to a respective one of the sensing zones. During a sensing operation, the array of memory elements to serially load a segment of select bits, each select bit having one of a select value and a non-select value, a memory element having a select value to select a number of sensing devices of the respective sensing zone to be enabled to perform its respective sensing function.