公开(公告)号：US20160141494A1

公开(公告)日：2016-05-19

申请号：US14898380

申请日：2013-07-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Si-Ty Lam ,  Xia Sheng ,  Richard H. Henze ,  Zhang-Lin Zhou

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1273 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1675

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

Abstract translation: 电阻式存储器件包括底电极和夹着开关层的顶电极。 该装置还包括从底部电极延伸到开关层中或由开关层覆盖的场增强（FE）特征，并且其是增强由两个电极产生的电场，从而限制该装置的开关面积 在FE特征。 该器件还包括围绕器件的平面层间电介质，用于支撑顶部电极。 还提供了使用所有层的原位真空沉积来制造电阻式存储器件的方法。

公开(公告)号：US09997703B2

公开(公告)日：2018-06-12

申请号：US14898380

申请日：2013-07-25

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Si-Ty Lam ,  Xia Sheng ,  Richard H. Henze ,  Zhang-Lin Zhou

IPC: H01L29/04 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1273 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1675

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.