ENHANCING POWER-PERFORMANCE EFFICIENCY IN A COMPUTER SYSTEM
    1.
    发明申请
    ENHANCING POWER-PERFORMANCE EFFICIENCY IN A COMPUTER SYSTEM 有权
    在计算机系统中提高功率性能

    公开(公告)号:US20150370304A1

    公开(公告)日:2015-12-24

    申请号:US14313597

    申请日:2014-06-24

    IPC分类号: G06F1/32

    摘要: Techniques described above may enhance the power-performance efficiency of a processor, SoC, or a computing system. Embodiments described here allow an increase in frequency of the clock signal to a peak frequency value in response to detecting an occurrence of a burst of high activity within the low processor utilization periods. A power management unit may accumulate the budget during the low or idle processor utilization periods and the level of activity of the burst of high activity signal may be determined. The PMU may increase the frequency of the clock signal provided to the processing cores if the level of the burst of high activity exceeds a first threshold value and an accumulated budget value exceeds a second threshold value.

    摘要翻译: 上述技术可以提高处理器,SoC或计算系统的功率性能效率。 这里描述的实施例响应于在低处理器利用周期内检测到高活动突发的发生,允许将时钟信号的频率增加到峰值频率值。 功率管理单元可以在低或空闲处理器利用周期期间累积预算,并且可以确定高活动信号的突发的活动级别。 如果高活动突发级别超过第一阈值并且累积预算值超过第二阈值,则PMU可以增加提供给处理核心的时钟信号的频率。