Method and apparatus for emulation of neuromorphic hardware including neurons and synapses connecting the neurons

    公开(公告)号:US10726337B1

    公开(公告)日:2020-07-28

    申请号:US15143466

    申请日:2016-04-29

    Abstract: In a method for emulation of neuromorphic hardware on a computer processor, the neuromorphic hardware including computing circuits, the computing circuits including neurons and synapses connecting the neurons, the neurons being configured to communicate to each other through the synapses via spikes, the computing circuits being configured to execute in parallel in increments of time, the method includes, for each said time increment, emulating processing of the synapses, emulating processing of the neurons, and recording by the processor the next ones of the spikes for a subset of the neurons on a non-transitory physical medium. The processing of the synapses includes receiving previous ones of the spikes at presynaptic ends of the synapses, and transmitting the received previous ones of the spikes to postsynaptic ends of the synapses. The processing of the neurons includes receiving current ones of the spikes and generating next ones of the spikes.

    System and method for model-based estimation and control of epidural spinal cord stimulation

    公开(公告)号:US10096385B1

    公开(公告)日:2018-10-09

    申请号:US15219162

    申请日:2016-07-25

    Abstract: Described is a system for controlling epidural spinal cord stimulation. Using an Unscented Kalman Filter (UKF), the system receives sensed physiological signals from a subject and, based on the sensed physiological signals, estimating an unobservable state of a target area on the subject. A central pattern generator is then used to generate a stimulation pattern based on the unobservable state. The stimulation pattern is applied to the target area (e.g., spinal cord) of the subject using an electrode array. Receiving feedback, the UKF continuously updates a model of the spinal cord, which results in adjustment of the stimulation pattern as necessary.

    Valley search method for estimating ego-motion of a camera from videos

    公开(公告)号:US10089549B1

    公开(公告)日:2018-10-02

    申请号:US15584986

    申请日:2017-05-02

    Abstract: Described is a system for estimating ego-motion of a moving camera for detection of independent moving objects in a scene. For consecutive frames in a video captured by a moving camera, a first ego-translation estimate is determined between the consecutive frames from a first local minimum. From a second local minimum, a second ego-translation estimate is determined. If the first ego-translation estimate is equivalent to the second ego-translation estimate, the second ego-translation estimate is output as the optimal solution. Otherwise, a cost function is minimized to determine an optimal translation until the first ego-translation estimate is equivalent to the second ego-translation estimate, and an optimal solution is output. Ego-motion of the camera is estimated using the optimal solution, and independent moving objects are detected in the scene.

    System and method to control a model state of a neuromorphic model of a brain

    公开(公告)号:US09940574B1

    公开(公告)日:2018-04-10

    申请号:US14248297

    申请日:2014-04-08

    CPC classification number: G06N3/063 G06N3/049

    Abstract: Model-based neural control uses a model of a portion of a brain and provides feedback control to the model that is based on a received output from the model. A neuromorphic model-based control system includes a neuromorphic model that includes a neuromorphic network to model the brain portion. A synaptic time-multiplexed (STM) neural model-based control system includes an STM neural network to the model the brain portion. The control systems further include a feedback controller to receive an output of the neuromorphic model or STM neural network and to provide a feedback control input to control a model state of the neuromorphic model or the STM neural network.

    NEURAL MODEL FOR REINFORCEMENT LEARNING
    6.
    发明申请
    NEURAL MODEL FOR REINFORCEMENT LEARNING 有权
    用于加强学习的神经模型

    公开(公告)号:US20140344202A1

    公开(公告)日:2014-11-20

    申请号:US14293928

    申请日:2014-06-02

    CPC classification number: G06N3/08 G06N3/04 G06N3/049 G06N99/005

    Abstract: A neural model for reinforcement-learning and for action-selection includes a plurality of channels, a population of input neurons in each of the channels, a population of output neurons in each of the channels, each population of input neurons in each of the channels coupled to each population of output neurons in each of the channels, and a population of reward neurons in each of the channels. Each channel of a population of reward neurons receives input from an environmental input, and is coupled only to output neurons in a channel that the reward neuron is part of. If the environmental input for a channel is positive, the corresponding channel of a population of output neurons are rewarded and have their responses reinforced, otherwise the corresponding channel of a population of output neurons are punished and have their responses attenuated.

    Abstract translation: 用于加强学习和动作选择的神经模型包括多个通道,每个通道中的输入神经元群体,每个通道中的输出神经元群,每个通道中的输入神经元的每个群体 耦合到每个信道中的每个输出神经元的群体,以及每个信道中的一群奖励神经元。 奖励神经元群体的每个通道从环境输入接收输入,并且仅耦合到奖励神经元属于其中的一个通道中的输出神经元。 如果通道的环境输入为正,输出神经元群体的相应通道将得到奖励,并加强其响应,否则输出神经元群体的相应通道受到惩罚并使其响应减弱。

    Spike domain convolution circuit
    8.
    发明授权

    公开(公告)号:US09721332B2

    公开(公告)日:2017-08-01

    申请号:US15043478

    申请日:2016-02-12

    CPC classification number: G06T5/20

    Abstract: A convolution circuit includes: a plurality of input oscillators, each configured to: receive a corresponding analog input signal of a plurality of analog input signals; and output a corresponding spiking signal of a plurality of spiking signals, the corresponding spiking signal having a spiking rate in accordance with a magnitude of the corresponding analog input signal; a plurality of 1-bit DACs, each of the 1-bit DACs being configured to: receive the corresponding spiking signal of the plurality of spiking signals from a corresponding one of the input oscillators; and receive a corresponding weight of a convolution kernel comprising a plurality of weights; output a corresponding weighted output of a plurality of weighted outputs in accordance with the corresponding spiking signal and the corresponding weight; and an output oscillator configured to generate an output spike signal in accordance with the plurality of weighted outputs from the plurality of 1-bit DACs.

    SPIKING MODEL TO LEARN ARBITRARY MULTIPLE TRANSFORMATIONS FOR A SELF-REALIZING NETWORK
    9.
    发明申请
    SPIKING MODEL TO LEARN ARBITRARY MULTIPLE TRANSFORMATIONS FOR A SELF-REALIZING NETWORK 有权
    用于实现自动实现网络的ARKITARY多种变换的SPIKEING模型

    公开(公告)号:US20150026110A1

    公开(公告)日:2015-01-22

    申请号:US14015001

    申请日:2013-08-30

    CPC classification number: G06N3/08 G06N3/049

    Abstract: A neural network, wherein a portion of the neural network comprises: a first array having a first number of neurons, wherein the dendrite of each neuron of the first array is provided for receiving an input signal indicating that a measured parameter gets closer to a predetermined value assigned to said neuron; and a second array having a second number of neurons, wherein the second number is smaller than the first number, the dendrite of each neuron of the second array forming an excitatory STDP synapse with the axon of a plurality of neurons of the first array; the dendrite of each neuron of the second array forming an excitatory STDP synapse with the axon of neighboring neurons of the second array.

    Abstract translation: 神经网络,其中所述神经网络的一部分包括:具有第一数量的神经元的第一阵列,其中所述第一阵列的每个神经元的枝晶被提供用于接收输入信号,所述输入信号指示所测量的参数越接近预定的 分配给所述神经元的值; 以及具有第二数量的神经元的第二阵列,其中所述第二数目小于所述第一数目,所述第二阵列的每个神经元的枝晶与所述第一阵列的多个神经元的轴突形成兴奋性STDP突触; 第二阵列的每个神经元的枝晶形成与第二阵列的相邻神经元的轴突的兴奋性STDP突触。

    Scalable integrated circuit with synaptic electronics and CMOS integrated memristors

    公开(公告)号:US11501143B2

    公开(公告)日:2022-11-15

    申请号:US16447210

    申请日:2019-06-20

    Abstract: A reconfigurable neural circuit includes an array of processing nodes. Each processing node includes a single physical neuron circuit having only one input and an output, a single physical synapse circuit having a presynaptic input, and a single physical output coupled to the input of the neuron circuit, a weight memory for storing N synaptic conductance value or weights having an output coupled to the single physical synapse circuit, a single physical spike timing dependent plasticity (STDP) circuit having an output coupled to the weight memory, a first input coupled to the output of the neuron circuit, and a second input coupled to the presynaptic input, and interconnect circuitry connected to the presynaptic input and connected to the output of the single physical neuron circuit. The synapse circuit and the STDP circuit are each time multiplexed circuits. The interconnect circuitry in each respective processing node is coupled to the interconnect circuitry in each other processing node.

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