MULTIMODE BASE STATION AND IMPLEMENTATION METHOD THEREOF
    1.
    发明申请
    MULTIMODE BASE STATION AND IMPLEMENTATION METHOD THEREOF 有权
    多模基站及其实现方法

    公开(公告)号:US20150110234A1

    公开(公告)日:2015-04-23

    申请号:US14581033

    申请日:2014-12-23

    Inventor: Weidong YU

    CPC classification number: H04L7/0331 H04B1/406 H04J3/0658 H04J3/0667 H04W88/10

    Abstract: The present invention relates to a method includes: implementing, by the board in the BBU1, frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using a synchronous Ethernet clock that is output by the board in the BBU0; and implementing, by the board in the BBU1, time synchronization between the system clock of the board in the BBU1 and the system clock of the board in the BBU0 by using an IEEE1588 clock that is output by the board in the BBU0. The present invention can enable the multimode base station to support more standards.

    Abstract translation: 本发明涉及一种方法,包括:通过BBU1中的单板,通过使用由BBU1中的单板输出的同步以太网时钟,实现BBU1中的单板的系统时钟与BBU0中的单板的系统时钟之间的频率同步 董事会在BBU0; 并通过BBU1中的单板通过BBU0中的板输出的IEEE1588时钟,在BBU1中的板上实现BBU1的单板的系统时钟与BBU0的单板的系统时钟之间的时间同步。 本发明可以使多模基站能够支持更多的标准。

    BASE STATION CLOCK APPARATUS, BASE STATION SYSTEM AND METHOD FOR CLOCK SYNCHRONIZATION
    2.
    发明申请
    BASE STATION CLOCK APPARATUS, BASE STATION SYSTEM AND METHOD FOR CLOCK SYNCHRONIZATION 有权
    基站时钟装置,基站系统和时钟同步方法

    公开(公告)号:US20130308532A1

    公开(公告)日:2013-11-21

    申请号:US13946184

    申请日:2013-07-19

    Abstract: A base station clock apparatus, a base station system, and a method for clock synchronization are provided in embodiments of the present invention. The base station clock apparatus includes: a first-standard clock module based on a first standard, configured to generate a first frequency synchronization clock signal, a first phase synchronization signal, and a first system clock signal according to a first external clock signal, where the first system clock signal includes the first frequency synchronization clock signal and the first phase synchronization signal; a second-standard clock module based on a second standard that is different from the first standard, configured to receive the first frequency synchronization clock signal and the first phase synchronization signal from the first-standard clock module, and generate a second system clock signal, where the second system clock signal includes the first frequency synchronization clock signal and the first phase synchronization signal.

    Abstract translation: 在本发明的实施例中提供了基站时钟装置,基站系统和时钟同步方法。 基站时钟装置包括:基于第一标准的第一标准时钟模块,被配置为根据第一外部时钟信号产生第一频率同步时钟信号,第一相位同步信号和第一系统时钟信号,其中 第一系统时钟信号包括第一频率同步时钟信号和第一相位同步信号; 基于与第一标准不同的第二标准的第二标准时钟模块,被配置为从第一标准时钟模块接收第一频率同步时钟信号和第一相位同步信号,并产生第二系统时钟信号, 其中第二系统时钟信号包括第一频率同步时钟信号和第一相位同步信号。

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