Semiconductor device and method manufacturing the same

    公开(公告)号:US10121863B2

    公开(公告)日:2018-11-06

    申请号:US15631993

    申请日:2017-06-23

    Abstract: A semiconductor device may include an n− type layer sequentially disposed at a first surface of an n+ type silicon carbide substrate; a p type region disposed in the n− type layer; an auxiliary n+ type region disposed on the p type region or in the p type region; an n+ type region disposed in the p type region; an auxiliary electrode disposed on the auxiliary n+ type region and the p type region; a gate electrode separated from the auxiliary electrode and disposed on the n− type layer; a source electrode separated from the auxiliary electrode and the gate electrode; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate, wherein the auxiliary n+ type region and the n+ type region are separated from each other, and the source electrode is in contact with the n+ type region.

    Method for manufacturing semiconductor device
    4.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US09391167B1

    公开(公告)日:2016-07-12

    申请号:US14944950

    申请日:2015-11-18

    Abstract: A method for manufacturing a semiconductor device includes: forming sequentially an n− type epitaxial layer and an n+ type area on a first surface of an n+ type silicon carbide substrate; forming a plurality of first trenches and a plurality of second trenches by etching the n− type epitaxial layer and the n+ type area using a first mask pattern as a mask after forming the first mask pattern on the n+ type area; forming a groove by etching the first mask pattern using a first photosensitive film pattern as a mask after forming the first photosensitive film pattern in the plurality of first trenches; forming a p type area by injecting p ions in the plurality of second trenches using the first mask pattern with the groove as the mask after removing the first photosensitive film pattern; forming a gate insulating layer in the plurality of first trenches after removing the first mask pattern with the groove; forming a gate electrode on the gate insulating layer; forming a passivation layer on the gate electrode; forming a source electrode in the plurality of second trenches; and forming a drain electrode on a second surface which is an opposite side to the first surface of the n+ type silicon carbide substrate.

    Abstract translation: 一种制造半导体器件的方法包括:在n +型碳化硅衬底的第一表面上依次形成n型外延层和n +型区域; 通过在n +型区域上形成第一掩模图案之后,使用第一掩模图案作为掩模蚀刻n型外延层和n +型区域,形成多个第一沟槽和多个第二沟槽; 通过在所述多个第一沟槽中形成所述第一感光膜图案之后,使用第一感光膜图案作为掩模蚀刻所述第一掩模图案来形成沟槽; 通过在去除第一感光膜图案之后,使用具有沟槽作为掩模的第一掩模图案,在多个第二沟槽中注入p离子来形成p型区域; 在用所述槽除去所述第一掩模图案之后,在所述多个第一沟槽中形成栅极绝缘层; 在栅极绝缘层上形成栅电极; 在栅电极上形成钝化层; 在所述多个第二沟槽中形成源电极; 以及在与n +型碳化硅衬底的第一表面相反的一侧的第二表面上形成漏电极。

    Semiconductor Device
    9.
    发明申请

    公开(公告)号:US20220157987A1

    公开(公告)日:2022-05-19

    申请号:US17170995

    申请日:2021-02-09

    Inventor: JongSeok Lee

    Abstract: An exemplary semiconductor device may include a substrate, an N− epitaxial layer positioned on the substrate, a first P region and a second P region positioned apart from each other on the N− epitaxial layer, a first N+ region positioned within the first P region, a second N+ region positioned within the second P region, and a gate layer positioned between the first P region and the second P region.

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