公开(公告)号：US06610560B2

公开(公告)日：2003-08-26

申请号：US09854303

申请日：2001-05-11

Applicant: Han-Ping Pu ,  Yu-Po Wang ,  Caesar Lin

Inventor： Han-Ping Pu ,  Yu-Po Wang ,  Caesar Lin

IPC: H01L2144

CPC classification number: H01L25/50 ,  H01L21/563 ,  H01L21/565 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/0401 ,  H01L2924/00012

Abstract: A semiconductor packaging technology is proposed for the fabrication of a chip-on-chip (COC) based multi-chip module (MCM) with molded underfill. The proposed semiconductor packaging technology is characterized by the provision of a side gap of an empirically-predetermined width between the overlying chips mounted through COC technology over an underlying chip to serve as an air vent during molding process. This allows the injected molding material to flow freely into the flip-chip undergaps during molding process. In actual application, the exact width of the side gap is empirically predetermined through molded-underfill simulation experiments to find the optimal value. Based on experimental data, it is found that this side gap width should be equal to or less than 0.3 mm to allow optimal underfill effect. The optimal value for this side gap width may be varied for different package specifications.