Float gate memory device
    1.
    发明授权
    Float gate memory device 失效
    浮动门存储器件

    公开(公告)号:US07310268B2

    公开(公告)日:2007-12-18

    申请号:US11115301

    申请日:2005-04-27

    IPC分类号: G11C16/04

    摘要: A float gate memory device comprises a bottom word line, a float channel layer formed on the bottom word line and kept at a floating state, a float gate, and a top word line formed on the float gate in parallel with the bottom word line. In the float gate formed on the float channel, data are stored. Here, data are written in the float gate depending on levels of the bottom word line and the top word line, and different channel resistances are induced to the float channel depending on polarity states of charges stored in the float gate, so that data are read. As a result, in the float gate memory device, a retention characteristic is improved, and cell integrated capacity is also increased due to a plurality of float gate cell arrays deposited vertically using a plurality of cell oxide layers.

    摘要翻译: 浮动栅极存储器件包括底部字线,形成在底部字线上并保持在浮置状态的浮动沟道层,浮动栅极和形成在浮动栅极上的与底部字线平行的顶部字线。 在浮动通道上形成的浮动门中,存储数据。 这里,根据底部字线和顶部字线的电平,将数据写入浮动栅极,并且根据存储在浮动栅极中的电荷的极性状态,将不同的通道电阻感应到浮动通道,从而读取数据 。 结果,在浮栅存储器件中,由于使用多个单元氧化物层垂直淀积的多个浮栅单元阵列,保持特性得到改善,并且单元集成能力也增加。

    Nonvolatile ferroelectric memory device
    2.
    发明授权
    Nonvolatile ferroelectric memory device 有权
    非易失性铁电存储器件

    公开(公告)号:US08035146B2

    公开(公告)日:2011-10-11

    申请号:US12820092

    申请日:2010-06-21

    IPC分类号: H01L27/115

    摘要: A nonvolatile ferroelectric memory device includes a plurality of unit cell arrays, wherein each of the plurality of unit cell arrays includes: a bottom word line; a plurality of insulating layers formed on the bottom word line, respectively; a floating channel layer comprising a plurality of channel regions located on the plurality of insulating layers and a plurality of drain and source regions which are alternately electrically connected in series to the plurality of channel regions; a plurality of ferroelectric layers formed respectively on the plurality of channel regions of the floating channel layer; and a plurality of word lines formed on the plurality of ferroelectric layers, respectively. The unit cell array reads and writes a plurality of data by inducing different channel resistance to the plurality of channel regions depending on polarity states of the plurality of ferroelectric layers.

    摘要翻译: 非易失性铁电存储器件包括多个单元阵列,其中多个单元阵列中的每一个包括:底部字线; 分别形成在底部字线上的多个绝缘层; 浮动沟道层,包括位于所述多个绝缘层上的多个沟道区和与所述多个沟道区交替电连接的多个漏极和源极区; 分别形成在所述浮动沟道层的所述多个沟道区上的多个铁电层; 以及分别形成在多个铁电体层上的多个字线。 根据多个铁电层的极性状态,单元阵列通过对多个沟道区域引起不同的沟道电阻来读取和写入多个数据。

    Nonvolatile ferroelectric memory device
    3.
    发明授权
    Nonvolatile ferroelectric memory device 有权
    非易失性铁电存储器件

    公开(公告)号:US07741668B2

    公开(公告)日:2010-06-22

    申请号:US11717081

    申请日:2007-03-13

    IPC分类号: H01L29/94

    摘要: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a N-type drain region, a P-type channel region and a N-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

    摘要翻译: 提供非易失性铁电存储器件,以便使用由铁电材料的极性状态区分的存储单元的沟道电阻来控制非易失性存储单元的读/写操作。 在存储器件中,在底部字线上形成绝缘层,并且在绝缘层上形成包括N型漏极区,P型沟道区和N型源极区的浮动沟道层。 然后,在浮动沟道层上形成铁电体层,在铁电体层上形成字线。 结果,根据铁电层的极性来控制感应到沟道区的电阻状态,从而调节存储单元阵列的读/写操作。

    Charge trap insulator memory device

    公开(公告)号:US07126185B2

    公开(公告)日:2006-10-24

    申请号:US11115135

    申请日:2005-04-27

    IPC分类号: H01L29/788

    摘要: A charge trap insulator memory device comprises a plurality of memory cells connected serially, a first switching device, and a second switching device. In the plurality of memory cells, data applied through a bit line depending on potentials applied to a top word line and a bottom word line are stored in a charge trap insulator or the data stored in the charge trap insulator are outputted to the bit line. The first switching element selectively connects the plurality of memory cells to the bit line in response to a first selecting signal. The second switching element selectively connects the plurality of memory cells to a sensing line in response to a second selecting signal.

    Nonvolatile ferroelectric memory device

    公开(公告)号:US07728369B2

    公开(公告)日:2010-06-01

    申请号:US11717145

    申请日:2007-03-13

    IPC分类号: H01L29/94

    摘要: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a N-type drain region, a P-type channel region and a N-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

    Nonvolatile ferroelectric memory device
    6.
    发明授权
    Nonvolatile ferroelectric memory device 失效
    非易失性铁电存储器件

    公开(公告)号:US07274593B2

    公开(公告)日:2007-09-25

    申请号:US11115302

    申请日:2005-04-27

    IPC分类号: G11C16/04

    摘要: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a P-type drain region, a P-type channel region and a P-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

    摘要翻译: 提供非易失性铁电存储器件,以便使用由铁电材料的极性状态区分的存储单元的沟道电阻来控制非易失性存储单元的读/写操作。 在存储器件中,在底部字线上形成绝缘层,在绝缘层上形成包括P型漏极区域,P型沟道区域和P型源极区域的浮动沟道层。 然后,在浮动沟道层上形成铁电体层,在铁电体层上形成字线。 结果,根据铁电层的极性来控制感应到沟道区的电阻状态,从而调节存储单元阵列的读/写操作。

    SELF-POWERED SOLAR TRACKER
    8.
    发明申请
    SELF-POWERED SOLAR TRACKER 审中-公开
    自供电太阳能追踪器

    公开(公告)号:US20140202521A1

    公开(公告)日:2014-07-24

    申请号:US14114884

    申请日:2012-08-22

    申请人: Jae Jin Lee

    发明人: Jae Jin Lee

    IPC分类号: H01L31/042

    摘要: Provided is a self-powered solar tracker, which is a solar tracker for adjusting the altitude of and horizontally rotating a solar collector panel such that the solar collector panel on which a plurality of solar cells are provided can face the sun, wherein the self-powered solar tracker comprises: an altitude adjustment optical sensor unit which has one or more first optical sensors formed by being uniformly spaced on the upper side of convex support surfaces to face the sun and one or more second optical sensors formed by being uniformly spaced on the lower side of the convex support surfaces, and which senses the sunlight so as to adjust the altitude of the solar collector panel; a horizontal rotation optical sensor unit which has one or more third optical sensors formed by being uniformly spaced on the left side of the convex support surfaces to face the sun and one or more fourth optical sensors formed by being uniformly spaced on the right side of the convex support surfaces, and which senses sunlight so as to horizontally rotate the solar collector panel; a passive element circuit which has one or more first comparison circuits for comparing the difference in the quantity of output light between the first optical sensors and the second optical sensors and one or more second comparison circuits for comparing the difference in the quantity of output light between the third optical sensors and the fourth optical sensors, and which outputs a driving value for adjusting the altitude of and horizontally rotating the solar collector panel in the direction having a larger light value; an altitude adjustment driving unit for receiving a driving power source from the solar cells of the solar collector panel and for adjusting the altitude of the solar collector panel according to the driving value of the passive element circuit; and a horizontal rotation driving unit for performing the horizontal rotation.

    摘要翻译: 提供了一种自供电的太阳能跟踪器,其是用于调节太阳能收集器板的高度并水平旋转的太阳能跟踪器,使得其上设置有多个太阳能电池的太阳能收集器面板可面向太阳,其中, 具有:高度调节光学传感器单元,其具有一个或多个第一光学传感器,所述第一光学传感器通过在凸起的支撑表面的上侧均匀地间隔开以面对太阳镜,以及一个或多个第二光学传感器,所述第二光学传感器通过在 凸起的支撑表面的下侧,并且感测太阳光以调节太阳能收集器板的高度; 水平旋转光学传感器单元,其具有一个或多个第三光学传感器,所述第三光学传感器通过在凸状支撑表面的左侧均匀地隔开以形成以面对太阳,以及一个或多个第四光学传感器,其通过在 凸起的支撑表面,并且其感测太阳光以水平地旋转太阳能收集器面板; 无源元件电路,其具有用于比较第一光学传感器和第二光学传感器之间的输出光量的差异的一个或多个第一比较电路和用于比较第一光学传感器和第二光学传感器之间的输出光量差异的一个或多个第二比较电路, 第三光传感器和第四光传感器,并且输出用于调节具有较大光值的方向的太阳能收集板的高度和水平旋转的驱动值; 高度调节驱动单元,用于从太阳能收集板的太阳能电池接收驱动电源,并根据无源元件电路的驱动值调节太阳能收集板的高度; 以及水平旋转驱动单元,用于执行水平旋转。

    Differential amplifying device
    9.
    发明授权
    Differential amplifying device 失效
    差分放大装置

    公开(公告)号:US07999611B2

    公开(公告)日:2011-08-16

    申请号:US12494620

    申请日:2009-06-30

    IPC分类号: H03F1/14

    摘要: A differential amplifying device includes a first differential amplifying unit that receives an input signal and a reference voltage. The first differential amplifying unit amplifies the input signal to generate an output signal when a sensing signal is at a first level. A second differential amplifying unit is configured to also receive the input signal and the reference voltage. The second differential amplifying unit amplifies the input signal to generate the output signal when the sensing signal is at a second level. The first and second differential amplifying units are configured to take advantage of transistor characteristics.

    摘要翻译: 差分放大装置包括接收输入信号和参考电压的第一差分放大单元。 当感测信号处于第一电平时,第一差分放大单元放大输入信号以产生输出信号。 第二差分放大单元被配置为还接收输入信号和参考电压。 当感测信号处于第二电平时,第二差分放大单元放大输入信号以产生输出信号。 第一和第二差分放大单元被配置为利用晶体管特性。