公开(公告)号：US20220283034A1

公开(公告)日：2022-09-08

申请号：US17624938

申请日：2020-07-09

Applicant: Heimann Sensor GmbH

Inventor： Jörg SCHIEFERDECKER ,  Frank HERRMANN ,  Christian SCHMIDT ,  Wilhelm LENEKE ,  Bodo FORG ,  Marion SIMON ,  Michael SCHNORR

IPC: G01J5/12 ,  G01J5/0802 ,  G01J5/04 ,  H01L27/146

Abstract: A method for producing a thermal infrared sensor array in a vacuum-filled wafer-level housing with particularly small dimensions, consisting of at least two wafers, a cover wafer and a central wafer comprising multiple infrared-sensitive sensor pixels on a respective thin slotted membrane over a heat-insulating cavity is disclosed. A method for producing a high-resolution monolithic silicon micromechanical thermopile array sensor using wafer level packaging technology, wherein the sensor achieves a particularly high spatial resolution capability and a very high filling degree with very small housing dimensions, in particular a very low overall thickness, and can be inexpensively produced using standard CMOS processes. This is achieved in that the cover wafer is first rigidly mechanically connected to the provided central wafer comprising the sensor pixels with the infrared-sensitive pixels by means of wafer bonding, and the central wafer is then thinned out from the wafer rear face to a specified thickness.

公开(公告)号：US20180283958A1

公开(公告)日：2018-10-04

申请号：US15766100

申请日：2016-07-05

Applicant: HEIMANN SENSOR GMBH

Inventor： Bodo FORG ,  Michael SCHNORR ,  Jörg SCHIEFERDECKER ,  Karlheinz STORCK ,  Marion SIMON ,  Wilhelm LENEKE

IPC: G01J5/08 ,  G01J5/22 ,  H04N5/33 ,  H04N5/378 ,  G01J5/14

CPC classification number: G01J5/0881 ,  G01F1/6888 ,  G01J5/06 ,  G01J5/12 ,  G01J5/14 ,  G01J5/22 ,  H04N5/33 ,  H04N5/378

Abstract: A high-resolution thermopile infrared sensor array having monolithically integrated signal processing and a plurality of parallel signal processing channels for the signals from pixels of a sensor array, and a digital port for the serial output of the pixel signals are provided, wherein the sensor array is located on one or more sensor chips. The thermal piled infrared sensor array possesses low power loss, high integration density and high thermal and geometric resolution. Each signal processing channel (K1 . . . KN) has at least one analogue/digital converter (ADC), and is assigned a memory region in a memory (RAM) for storing the signals from the pixels (SE).

公开(公告)号：US20180335347A1

公开(公告)日：2018-11-22

申请号：US15777742

申请日：2016-11-28

Applicant: HEIMANN SENSOR GMBH

Inventor： Frank HERRMANN ,  Christian SCHMIDT ,  Jörg SCHIEFERDECKER ,  Wilhelm LENEKE ,  Bodo FORG ,  Marion SIMON ,  Michael SCHNORR

IPC: G01J5/02 ,  G01J5/04 ,  G01J5/12

Abstract: A thermal infrared sensor array in a wafer-level package includes at least one infrared-sensitive pixel produced using silicon micro mechanics, comprising a heat-isolating cavity in a silicon substrate surrounded by a silicon edge, and a thin membrane connected to the silicone edge by of thin beams. The cavity extends through the silicon substrate to the membrane, and there are slots between the membrane, the beams and the silicon edge. A plurality of infrared-sensitive individual pixels are arranged in lines or arrays and are designed in a CMOS stack in a dielectric layer, forming the membrane, and are arranged between at least one cover wafer which is designed in the form of a cap and has a cavity and a base wafer. The cover wafer, the silicon substrate and the base wafer are connected to one another in a vacuum-tight manner and enclosing a gas vacuum.