公开(公告)号：US07486530B2

公开(公告)日：2009-02-03

申请号：US11116842

申请日：2005-04-28

申请人： Hendrik Hartono ,  Benjamin Louie ,  Aaron Yip ,  Hagop A. Nazarian

发明人： Hendrik Hartono ,  Benjamin Louie ,  Aaron Yip ,  Hagop A. Nazarian

IPC分类号： G11C15/00 ,  G11C7/06 ,  G11C16/04

CPC分类号： G11C7/22 ,  G06F12/0893 ,  G11C16/3436 ,  G11C2207/2245 ,  G11C2216/14

摘要： A non-volatile memory device and data comparison circuit are described that facilitate the comparison of data between two blocks of data, such as the I/O buffer or data cache of a memory and the sense amplifiers, that allow for simple and rapid comparison of data bits and results in a signal flag indicating a data match or a mis-match. This allows for a simple parallel data bit comparison capability that allows a fast initial comparison result without requiring a time-consuming individual bit-by-bit data comparison. In one embodiment, two data blocks to be compared are divided into a number of paired segments, wherein each pair of segments are compared in parallel by a data comparison circuit, such that a mis-match can be located to the affected data segments or the results logically combined to indicate a match or mis-match for the complete data blocks.

摘要翻译： 描述了一种非易失性存储器件和数据比较电路，其有助于比较诸如存储器的I / O缓冲器或数据高速缓冲存储器和读出放大器的两个数据块之间的数据，其允许简单和快速地比较 数据位并产生指示数据匹配或不匹配的信号标志。 这允许一个简单的并行数据位比较功能，允许快速的初始比较结果，而不需要耗时的单独的逐位数据比较。 在一个实施例中，要比较的两个数据块被分成多个成对段，其中每对段被数据比较电路并行地比较，使得可以将错误匹配定位到受影响的数据段或 结果逻辑组合以指示完整数据块的匹配或不匹配。

公开(公告)号：US07254049B2

公开(公告)日：2007-08-07

申请号：US11580660

申请日：2006-10-13

申请人： Hendrik Hartono ,  Benjamin Louie ,  Aaron Yip ,  Hagop A. Nazarian

发明人： Hendrik Hartono ,  Benjamin Louie ,  Aaron Yip ,  Hagop A. Nazarian

IPC分类号： G11C15/00 ,  G11C7/10

CPC分类号： G11C7/22 ,  G06F12/0893 ,  G11C16/3436 ,  G11C2207/2245 ,  G11C2216/14

摘要： A non-volatile memory device and data comparison circuit are described that facilitate the comparison of data between two blocks of data, such as the I/O buffer or data cache of a memory and the sense amplifiers, that allow for simple and rapid comparison of data bits and results in a signal flag indicating a data match or a mis-match. This allows for a simple parallel data bit comparison capability that allows a fast initial comparison result without requiring a time-consuming individual bit-by-bit data comparison. In one embodiment, two data blocks to be compared are divided into a number of paired segments, wherein each pair of segments are compared in parallel by a data comparison circuit, such that a mis-match can be located to the affected data segments or the results logically combined to indicate a match or mis-match for the complete data blocks.

公开(公告)号：US08174889B2

公开(公告)日：2012-05-08

申请号：US12703901

申请日：2010-02-11

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US20090154247A1

公开(公告)日：2009-06-18

申请号：US12370810

申请日：2009-02-13

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US07269066B2

公开(公告)日：2007-09-11

申请号：US11126790

申请日：2005-05-11

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US20100142280A1

公开(公告)日：2010-06-10

申请号：US12703901

申请日：2010-02-11

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US07345924B2

公开(公告)日：2008-03-18

申请号：US11546171

申请日：2006-10-11

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US20120221779A1

公开(公告)日：2012-08-30

申请号：US13464531

申请日：2012-05-04

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G06F12/00

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US07688630B2

公开(公告)日：2010-03-30

申请号：US12370810

申请日：2009-02-13

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.

摘要翻译： 通过将编程电压施加到包括目标存储器单元的字线，确定目标存储器单元是否被编程来编程存储器件的目标存储器单元，并且如果确定所述编程电压被确定为 目标存储单元未编程。 在制造存储器件之后，可以选择初始编程电压和阶跃电压。

公开(公告)号：US08520436B2

公开(公告)日：2013-08-27

申请号：US13464531

申请日：2012-05-04

申请人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

发明人： Dzung H. Nguyen ,  Benjamin Louie ,  Hagop A. Nazarian ,  Aaron Yip ,  Jin-Man Han

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.