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公开(公告)号：US4442530A
公开(公告)日：1984-04-10
申请号：US304018
申请日：1981-09-21
CPC分类号： H04L27/365
摘要： A digital transmitter wherein a read only memory (ROM) is addressed by subaddresses representing vector components of signal point positions of a desired transmit spectrum. In this manner, greatly reduced ROM storage requirements are achieved.
摘要翻译： 一种数字发射机，其中只读存储器（ROM）由表示所需发射频谱的信号点位置的矢量分量的子地址来寻址。 以这种方式，实现了大大减少的ROM存储要求。
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公开(公告)号：US4807230A
公开(公告)日：1989-02-21
申请号：US55805
申请日：1987-05-29
摘要： Disclosed is a modem including a transmitter having a convolutional encoder for transforming each group interval digital data into an expanded bit sequence having symbol-selecting bits and subset-selecting bits forming a plurality of bit groups, with each bit group designating a 2-dimensional subset and the symbol-selecting bits being used to select one 2-dimensional symbol from each of the selected subsets, the transmitter further providing modulation of a carrier signal, and a receiver wherein synchronization of received frames of subset-selecting bits is provided by applying a parity check equation to a plurality of possible received frames of subset-selecting bits.
摘要翻译： 公开了一种调制解调器，包括具有卷积编码器的发射机，用于将每个组间隔数字数据变换为具有符号选择位的扩展位序列和形成多个位组的子集选择位，每个位组指定二维子集 并且所述符号选择位用于从所选择的子集中的每一个选择一个2维符号，所述发射机还提供载波信号的调制，以及接收机，其中子集选择位的接收帧的同步通过应用 奇偶校验方程到子集选择位的多个可能的接收帧。
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3.发明授权Method and apparatus for reduction of sinusoidal phase jitter in a high speed data modem 失效用于降低高速数据调制解调器中的正弦相位抖动的方法和装置
公开(公告)号：US4689804A
公开(公告)日：1987-08-25
申请号：US765419
申请日：1985-08-14
CPC分类号： H04L27/066
摘要： An apparatus for cancellation of sinusoidal varying phase jitter in a data modem is implemented in firmware using microprocessor technology. An estimate of the frequency and phase of the phase jitter is computed in a first stage. Substantially independently, an estimate of the amplitude of the phase jitter is computed in another stage. These estimates are combined to form a composite estimate of the phase jitter which is utilized to cancel out the sinusoidal phase jitter in the demodulator. Digital phase locked loop technology (DPLL) is utilized to lock onto the phase jitter components. The capture range of the phase locked loop is dynamically altered during a training sequence to allow for capturing a wide range of jitter frequencies. During the training sequence the damping factor of the loop is gradually altered thereby substantially reducing the capture range and response time of the loop once jitter acquisition has occurred. This results in enhanced noise performance while still retaining the capability of locking to a wide range of jitter frequencies. Quantization of the error signal is utilized to compute estimates of the frequencies and phase of the jitter signal so that continuous updating occurs virtualy without regard for the amplitude or change in amplitude of the jitter signal.
摘要翻译： 用于消除数据调制解调器中的正弦变化相位抖动的装置在使用微处理器技术的固件中实现。 在第一阶段计算相位抖动的频率和相位的估计。 基本上独立地，在另一个阶段计算相位抖动幅度的估计。 这些估计被组合以形成用于抵消解调器中的正弦相位抖动的相位抖动的复合估计。 利用数字锁相环技术（DPLL）锁定相位抖动分量。 在训练序列期间动态地改变锁相环的捕获范围，以允许捕获宽范围的抖动频率。 在训练序列期间，循环的阻尼因子逐渐改变，从而在抖动获取发生之后大大减少了环路的捕获范围和响应时间。 这导致增强的噪声性能，同时仍然保持锁定到宽范围的抖动频率的能力。 利用误差信号的量化来计算抖动信号的频率和相位的估计，使得不考虑抖动信号的幅度或振幅的变化，连续更新是虚拟的。
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公开(公告)号：US4601044A
公开(公告)日：1986-07-15
申请号：US548572
申请日：1983-11-04
CPC分类号： H04L27/3433 , H04L27/00 , H04L27/3438 , H04L27/3818 , H04L27/3872
摘要： Disclosed is a modulation-demodulation system and method for transmitting a plurality of sequentially received information bit sequences, the system including a transmitter having a state machine for expanding by a coding process each information bit sequence into an expanded bit sequence with a coded bit group portion and, in some cases, an uncoded bit group portion. The transmitter further includes a modulator for modulating a carrier signal by one of a plurality of multilevel symbols in a two-dimensional complex plane in response to each sequentially applied expanded bit sequence, with the coded bit group portion being used to specify a subset of the multilevel symbols which when rotated in the complex plane maps upon another subset for each adverse angular rotation and the uncoded bit group portion being used to specify for a selected multiple symbol subset the transmitted multilevel symbol of the carrier signal. The system further includes a receiver having a demodulator and slicer for demodulating and detecting the modulated carrier signal to obtain the expanded bit sequences; a phase rotation detector, coupled to the slicer, for uniquely identifying each adverse angular rotation by analyzing a plurality of sequentially applied coded bit group portions; and a phase corrector, coupled to the phase rotation detector, for compensating for the adverse angular rotation.
摘要翻译： 公开了一种用于发送多个顺序接收的信息比特序列的调制解调系统和方法，该系统包括具有状态机的发射机，用于通过编码处理将每个信息比特序列扩展为具有编码比特组部分的扩展比特序列 并且在一些情况下，是未编码的位组部分。 所述发射机还包括调制器，用于响应于每个顺序应用的扩展比特序列，在二维复平面中的多个多电平符号中的一个调制载波信号，所述编码比特组部分用于指定所述载波信号的子集 当在复平面中旋转时，多级符号映射到每个不利角旋转的另一子集，并且未编码位组部分被用于为所选择的多符号子集指定所传输的载波信号的多电平符号。 该系统还包括具有用于解调和检测调制载波信号以获得扩展比特序列的解调器和限幅器的接收机; 相位旋转检测器，耦合到限幅器，用于通过分析多个顺序施加的编码位组部分来唯一地识别每个不利的角旋转; 以及相位校正器，耦合到相位旋转检测器，用于补偿不利的角旋转。
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公开(公告)号：US4761784A
公开(公告)日：1988-08-02
申请号：US4389
申请日：1987-01-15
CPC分类号： H03M13/25 , H04L27/3438
摘要： Disclosed is a modem including a transmitter having a convolutional encoder for transforming each group interval digital data into an expanded bit sequence having symbol-selecting bits and a frame of subset-selecting bits forming a plurality of bit groups, with each bit group designating a 2-dimensional subset and the symbol-selecting bits being used to select one 2-dimensional symbol from each of the selected subsets, the transmitter further providing modulation of a carrier signal, and a receiver wherein a commonality-seeking, branch cost calculator determines the candidate branch associated with the minimum cost N-dimensional symbol subset for each coset and a Viterbi decoder which determines the maximum likelihood path from a plurality of surviving paths formed from branches selected from the candidate branches.
摘要翻译： 公开了一种调制解调器，包括具有卷积编码器的发射机，用于将每个组间隔数字数据变换为具有符号选择位的扩展位序列和形成多个位组的子集选择位的帧，每个位组指定2 所述符号选择位用于从所选择的子集中的每一个中选择一个2维符号，所述发射机还提供载波信号的调制，以及接收机，其中寻求共同的分支成本计算器确定所述候选者 与每个陪集的最小成本N维符号子集相关联的分支以及从选自候选分支的分支形成的多个幸存路径中确定最大似然路径的维特比解码器。
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公开(公告)号：US4583236A
公开(公告)日：1986-04-15
申请号：US698466
申请日：1985-02-05
CPC分类号： H04L27/3818 , H04L27/00 , H04L27/3433 , H04L27/3438
摘要： Disclosed is a modulation-demodulation system and method for transmitting a plurality of sequentially received information bit sequences, the system including a transmitter having a state machine for expanding by a coding process each information bit sequence into an expanded bit sequence with a coded bit group portion and, in some cases, an uncoded bit group portion. The transmitter further includes a modulator for modulating a carrier signal by one of a plurality of multilevel symbols in a two-dimensional complex plane in response to each sequentially applied expanded bit sequence, with the coded bit group portion being used to specify a subset of the multilevel symbols which when rotated in the complex plane maps upon another subset for each adverse angular rotation and the uncoded bit group portion being used to specify for a selected multiple symbol subset the transmitted multilevel symbol of the carrier signal. The system further includes a receiver having a demodulator and slicer for demodulating and detecting the modulated carrier signal to obtain the expanded bit sequences; a phase rotation detector, coupled to the slicer, for uniquely identifying each adverse angular rotation by analyzing a plurality of non-rotated and rotated sequentially received coded bit group portions; and a phase corrector, coupled to the phase rotation detector, for compensating for the adverse angular rotation.
摘要翻译： 公开了一种用于发送多个顺序接收的信息比特序列的调制解调系统和方法，该系统包括具有状态机的发射机，用于通过编码处理将每个信息比特序列扩展为具有编码比特组部分的扩展比特序列 并且在一些情况下，是未编码的位组部分。 所述发射机还包括调制器，用于响应于每个顺序应用的扩展比特序列，在二维复平面中的多个多电平符号中的一个调制载波信号，所述编码比特组部分用于指定所述载波信号的子集 当在复平面中旋转时，多级符号映射到每个不利角旋转的另一子集，并且未编码位组部分被用于为所选择的多符号子集指定所传输的载波信号的多电平符号。 该系统还包括具有用于解调和检测调制载波信号以获得扩展比特序列的解调器和限幅器的接收机; 相位旋转检测器，耦合到限幅器，用于通过分析多个非旋转和旋转的顺序接收的编码位组部分来唯一地识别每个不利的角旋转; 以及相位校正器，耦合到相位旋转检测器，用于补偿不利的角旋转。
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