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    Method and apparatus for extraction of baseband waveform from amplitude modulated signal via time domain sampling
    5.
    发明授权
    Method and apparatus for extraction of baseband waveform from amplitude modulated signal via time domain sampling 有权
    通过时域采样从幅度调制信号中提取基带波形的方法和装置

    公开(公告)号：US09537690B1

    公开(公告)日：2017-01-03

    申请号：US14796144

    申请日：2015-07-10

    申请人： Keysight Technologies, Inc.

    发明人： Daniel P. Timm ,  Steven J. Pelelo

    IPC分类号： H03D1/24 ,  H04L27/06 ,  H04L27/26

    CPC分类号： H04L27/06 ,  H04L27/066

    摘要： A measurement apparatus, for example a digital oscilloscope, receives an amplitude modulated (AM) signal comprising a baseband signal, having a baseband waveform, modulating a carrier signal, and reconstructs the baseband waveform. The measurement apparatus: samples the AM signal at a sampling rate which produces a plurality of data samples for each period of the carrier signal; determines the amplitude of the baseband signal for each of a plurality of periods of the carrier signal from at least some of the plurality of data samples for each period; and reconstructs the baseband waveform from the amplitudes of the baseband signal for each of the plurality of periods of the carrier signal. The measurement apparatus may display the reconstructed baseband waveform on a display device.

    摘要翻译： 测量装置，例如数字示波器，接收包括具有基带波形的基带信号的幅度调制（AM）信号，对载波信号进行调制，并重构基带波形。 测量装置以对载波信号的每个周期产生多个数据采样的采样速率采样AM信号; 对于每个周期的多个数据样本中的至少一些，确定载波信号的多个周期中的每一个的基带信号的幅度; 并且对于载波信号的多个周期中的每个周期，从基带信号的幅度重构基带波形。 测量装置可以在显示装置上显示重建的基带波形。

    Reduction of effects of signal-signal beat interference in optical transport systems
    6.
    发明授权
    Reduction of effects of signal-signal beat interference in optical transport systems 有权
    减少光传输系统中信号信号差拍干扰的影响

    公开(公告)号：US09374171B2

    公开(公告)日：2016-06-21

    申请号：US14575596

    申请日：2014-12-18

    申请人： Alcatel-Lucent USA Inc.

    发明人： Sebastian A. Randel ,  Dario Pilori

    IPC分类号： H04B10/69 ,  H04B10/61 ,  H04L27/06 ,  H04J14/00 ,  H04J11/00

    CPC分类号： H04J11/0023 ,  H04B10/5165 ,  H04B10/697 ,  H04L27/066

    摘要： Disclosed herein is an optical transport system configured to transport an amplitude-modulated optical signal generated at the transmitter using single-sideband modulation of an optical carrier and detected at the receiver using direct optical detection. The receiver is configured to estimate the level of signal-signal beat interference (SSBI) in the electrical signal generated upon direct detection of the received optical signal by first converting this electrical signal into a modified baseband signal configured for single-sideband modulation and then squaring and appropriately scaling this modified baseband signal. The receiver is further configured to subtract the estimated level of SSBI from the electrical signal generated by the direct optical detector and to process the resulting corrected electrical signal to recover the data encoded in the amplitude-modulated optical signal. Example analog and digital circuits for estimating the level of SSBI at the receiver are disclosed.

    摘要翻译： 这里公开了一种光传输系统，其被配置为使用光载波的单边带调制传输在发射机处产生的幅度调制的光信号，并且在接收机处使用直接光检测来检测。 接收机被配置为通过首先将该电信号转换成被配置用于单边带调制的修改的基带信号，然后平方，来估计在直接检测接收到的光信号时产生的电信号中的信号信号差拍干扰（SSBI）的电平 并适当地缩放该修改的基带信号。 接收机还被配置为从由直接光学检测器产生的电信号中减去SSBI的估计电平，并且处理所得到的经校正的电信号以恢复在幅度调制光信号中编码的数据。 公开了用于估计接收机上SSBI电平的示例性模拟和数字电路。

    Carrier Recovery in a QAM Receiver
    7.
    发明申请
    Carrier Recovery in a QAM Receiver 有权
    QAM接收机中的载波恢复

    公开(公告)号：US20160006590A1

    公开(公告)日：2016-01-07

    申请号：US14769672

    申请日：2014-02-28

    申请人： E.V. Offshore Limited

    发明人： Jonathan Thursby ,  Sumanth Eadala

    IPC分类号： H04L27/06 ,  H04L27/38 ,  H04L27/227

    CPC分类号： H04L27/066 ,  H04L27/2273 ,  H04L27/3872

    摘要： The present invention relates to inspection apparatus for use in wellbores in the oil and gas industries. In particular the invention relates in general to the field of transmission of data between downhole module in a wellbore and a controlling module at the surface. The invention provides a method an apparatus for receiving data from a telemetry module, the data being modulated according to a quadrature amplitude modulation coding scheme, in which a receiver has a carrier recovery circuit comprising a phase detector, a loop filter and a signal synthesiser generating an inphase and a quadrature demodulation signal. The method comprises receiving a preamble sinusoidal signal representing a symbol; determining the cross product of the received inphase and quadrature components and ideal inphase and quadrature components; indexing a look up table with said cross product to determine a phase adjustment and adjusting the phase of the demodulation signals in accordance with said determined phase adjustment.

    摘要翻译： 本发明涉及用于石油和天然气工业的井筒中的检查装置。 特别地，本发明一般涉及在井筒中的井下模块与表面上的控制模块之间的数据传输领域。 本发明提供一种用于从遥测模块接收数据的装置的方法，该数据根据正交幅度调制编码方案进行调制，其中接收机具有载波恢复电路，该载波恢复电路包括相位检测器，环路滤波器和产生信号合成器 同相和正交解调信号。 该方法包括：接收表示符号的前导码正弦信号; 确定接收的同相和正交分量与理想的同相和正交分量的交叉积; 用所述交叉乘积索引查找表以确定相位调整并根据所述确定的相位调整来调整解调信号的相位。

    Baud Rate Phase Detector with No Error Latches
    8.
    发明申请
    Baud Rate Phase Detector with No Error Latches 有权
    波特率相位检测器，无错误锁存

    公开(公告)号：US20150234423A1

    公开(公告)日：2015-08-20

    申请号：US14222157

    申请日：2014-03-21

    申请人： LSI Corporation

    发明人： Volodymyr Shvydun ,  Adam B. Healey ,  Chaitanya Palusa ,  Hiep T. Pham

    IPC分类号： G06F1/12

    CPC分类号： G06F1/12 ,  H03L7/087 ,  H03L7/091 ,  H04L7/0338 ,  H04L25/022 ,  H04L27/066 ,  H04L27/2275 ,  H04L27/2695 ,  H04L2027/0067

    摘要： Phase detectors and timing recovery techniques that do not require error latches nor oversampling of the received input data are disclosed. The phase detection method includes separating an input signal into N consecutive data bits; comparing at least two consecutive data bits within the N consecutive data bits; estimating a data bit value for each of the N consecutive data bits; and determining a phase difference based on a data bit pattern formed by the data bit values of the N consecutive data bits and the comparison of the at least two consecutive data bits within the N consecutive data bits.

    摘要翻译： 公开了不需要错误锁存器或接收的输入数据的过采样的相位检测器和定时恢复技术。 相位检测方法包括将输入信号分离成N个连续数据位; 比较N个连续数据比特中的至少两个连续数据比特; 估计每个N个连续数据比特的数据比特值; 以及基于由N个连续数据位的数据位值形成的数据位模式和在N个连续数据位中的至少两个连续数据位的比较来确定相位差。

    CLOCK SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR DEVICE
    9.
    发明申请
    CLOCK SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
    时钟同步电路和半导体器件

    公开(公告)号：US20150124917A1

    公开(公告)日：2015-05-07

    申请号：US14592054

    申请日：2015-01-08

    申请人： LAPIS SEMICONDUCTOR CO., LTD.

    发明人： Kenji ARAI

    IPC分类号： H04L27/06

    CPC分类号： H04L27/066 ,  G06F1/12 ,  G06F13/42 ,  H03K3/35606 ,  H03K3/356156 ,  H03K19/0013 ,  H03K19/018521 ,  H03K19/096 ,  H03L7/00 ,  H04L7/00 ,  H04L7/0008 ,  H04L7/033

    摘要： A clock synchronization circuit is configured to capture an input data bit according to an input clock signal, and to synchronize and output the input data bit. The clock synchronization circuit includes a clock buffer for generating an internal clock signal according to the input clock signal and transmitting the internal clock signal to a clock line. The clock synchronization circuit further includes a D flip-flop for capturing and outputting the input data bit at an edge timing of the internal clock signal. The clock buffer includes an inverter core portion and an electric current suppressing portion. The inverter core portion is configured to generate the internal clock signal through alternately supplying an electric current to the clock line and drawing the electric current from the clock line according to the input clock signal. The electric current suppressing portion is configured to suppress an amount of the electric current.

    摘要翻译： 时钟同步电路被配置为根据输入时钟信号捕获输入数据位，并且同步并输出输入数据位。 时钟同步电路包括用于根据输入时钟信号产生内部时钟信号并将内部时钟信号发送到时钟线的时钟缓冲器。 时钟同步电路还包括用于在内部时钟信号的边缘定时处捕获并输出输入数据位的D触发器。 时钟缓冲器包括逆变器芯部分和电流抑制部分。 逆变器芯部被配置为通过交替地向时钟线提供电流并根据输入时钟信号从时钟线引出电流来产生内部时钟信号。 电流抑制部被配置为抑制电流量。

    DATA RECEIVING CIRCUIT AND SEMICONDUCTOR DEVICE
    10.
    发明申请
    DATA RECEIVING CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
    数据接收电路和半导体器件

    公开(公告)号：US20150085913A1

    公开(公告)日：2015-03-26

    申请号：US14561095

    申请日：2014-12-04

    申请人： LAPIS Semiconductor Co., Ltd.

    发明人： Hideaki HASEGAWA ,  Kouji TAKEDA

    IPC分类号： H04L27/01 ,  H04L27/38

    CPC分类号： H04L27/01 ,  H04L25/0274 ,  H04L25/03878 ,  H04L27/066 ,  H04L27/3809

    摘要： A data receiving circuit that can accurately obtain a data signal corresponding to information data from a high speed high density transmitted signal, and a semiconductor device including the data receiving circuit. The amplitude of a first differential signal corresponding to a level difference between a pair of received differential signals, generated in a first differential stage, is amplified and binalized to obtain a received data signal. A second differential signal corresponding to the level difference between the received differential signals, and a third differential signal which is a phase-inverted signal of the second differential signal are generated in a second differential stage provided separately, and a current corresponding to the second differential signal and a current corresponding to the third differential signal are discharged into the respective ones of the pair of transmission lines, thereby suppressing the amplitudes of the received differential signals.

    摘要翻译： 一种数据接收电路，其可以从高速高密度发送信号准确地获得与信息数据对应的数据信号，以及包括数据接收电路的半导体器件。 对应于在第一差分级中产生的一对接收差分信号之间的电平差的第一差分信号的幅度被放大并双化以获得接收的数据信号。 在分别设置的第二差分级中产生对应于接收的差分信号之间的电平差的第二差分信号和作为第二差分信号的相位反转信号的第三差分信号，并且与第二差分 信号和对应于第三差分信号的电流被放电到一对传输线中的相应传输线中，从而抑制接收到的差分信号的幅度。